DSPIC30F6011T-20I/PF Microchip Technology, DSPIC30F6011T-20I/PF Datasheet - Page 218

• Manufacturer Part Number: DSPIC30F6011T-20I/PF
• Description: IC DSPIC MCU/DSP 132K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6011T-20I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6011T20IP

dsPIC30F6011/6012/6013/6014
Data Converter Interface (DCI) Module ............................ 123
Data EEPROM Memory ...................................................... 57
DC Characteristics ............................................................ 171
DCI Module
DS70117E-page 216
Memory Map ............................................................... 31
Memory Map for dsPIC30F6011/6013 ........................ 32
Memory Map for dsPIC30F6012/6014 ........................ 33
Near Data Space ........................................................ 35
Software Stack ............................................................ 35
Spaces ........................................................................ 31
Width........................................................................... 34
Erasing ........................................................................ 58
Erasing, Block ............................................................. 58
Erasing, Word ............................................................. 58
Protection Against Spurious Write .............................. 61
Reading....................................................................... 57
Write Verify ................................................................. 61
Writing ......................................................................... 59
Writing, Block .............................................................. 60
Writing, Word .............................................................. 59
BOR .......................................................................... 182
Brown-out Reset ....................................................... 181
I/O Pin Input Specifications ....................................... 179
I/O Pin Output Specifications .................................... 180
Idle Current (I
Low-Voltage Detect................................................... 180
LVDL ......................................................................... 181
Operating Current (I
Power-Down Current (I
Program and EEPROM............................................. 182
Bit Clock Generator................................................... 127
Buffer Alignment with Data Frames .......................... 129
Buffer Control ............................................................ 123
Buffer Data Alignment ............................................... 123
Buffer Length Control................................................ 129
COFS Pin.................................................................. 123
CSCK Pin.................................................................. 123
CSDI Pin ................................................................... 123
CSDO Mode Bit ........................................................ 130
CSDO Pin ................................................................. 123
Data Justification Control Bit ..................................... 128
Device Frequencies for Common Codec
Digital Loopback Mode ............................................. 130
Enable....................................................................... 125
Frame Sync Generator ............................................. 125
Frame Sync Mode Control Bits ................................. 125
I/O Pins ..................................................................... 123
Interrupts ................................................................... 130
Introduction ............................................................... 123
Master Frame Sync Operation .................................. 125
Operation .................................................................. 125
Operation During CPU Idle Mode ............................. 130
Operation During CPU Sleep Mode .......................... 130
Receive Slot Enable Bits........................................... 128
Receive Status Bits ................................................... 129
Register Map............................................................. 132
Sample Clock Edge Control Bit................................. 128
Slave Frame Sync Operation .................................... 126
Slot Enable Bits Operation with Frame Sync ............ 128
Slot Status Bits.......................................................... 130
Synchronous Data Transfers .................................... 128
Timing Characteristics
CSCK Frequencies (Table)............................... 127
AC-Link Mode ................................................... 196
Multichannel, I
IDLE
) .................................................... 175
2
DD
S Modes ................................... 194
)............................................. 173
PD
) ........................................ 177
Preliminary
Demonstration Boards
Development Support ....................................................... 165
Device Configuration
Device Configuration Registers
Device Overview................................................................... 9
Disabling the UART .......................................................... 105
Divide Support .................................................................... 18
DSP Engine ........................................................................ 19
Dual Output Compare Match Mode .................................... 88
E
Electrical Characteristics .................................................. 171
Enabling and Setting Up UART
Enabling the UART ........................................................... 105
Equations
Errata .................................................................................... 7
Evaluation and Programming Tools.................................. 169
External Clock Timing Characteristics
External Clock Timing Requirements ............................... 184
External Interrupt Requests ................................................ 49
F
Fast Context Saving ........................................................... 49
Flash Program Memory ...................................................... 51
Timing Requirements
Transmit Slot Enable Bits ......................................... 128
Transmit Status Bits.................................................. 129
Transmit/Receive Shift Register ............................... 123
Underflow Mode Control Bit...................................... 130
Word Size Selection Bits .......................................... 125
PICDEM 1................................................................. 168
PICDEM 17............................................................... 168
PICDEM 18R ............................................................ 169
PICDEM 2 Plus......................................................... 168
PICDEM 3................................................................. 168
PICDEM 4................................................................. 168
PICDEM LIN ............................................................. 169
PICDEM USB ........................................................... 169
PICDEM.net Internet/Ethernet .................................. 168
Register Map ............................................................ 155
FBORPOR ................................................................ 153
FGS .......................................................................... 153
FOSC........................................................................ 153
FWDT ....................................................................... 153
Instructions (Table) ..................................................... 18
Multiplier ..................................................................... 21
Continuous Pulse Mode.............................................. 88
Single Pulse Mode...................................................... 88
AC............................................................................. 183
DC ............................................................................ 171
Setting Up Data, Parity and Stop Bit Selections ....... 105
A/D Conversion Clock............................................... 135
Baud Rate................................................................. 107
Bit Clock Frequency.................................................. 127
COFSG Period.......................................................... 125
Serial Clock Rate ...................................................... 100
Time Quantum for Clock Generation ........................ 117
Type A, B and C Timer ............................................. 190
Type A Timer ............................................................ 190
Type B Timer ............................................................ 191
Type C Timer ............................................................ 191
Control Registers ........................................................ 52
AC-Link Mode................................................... 196
Multichannel, I
NVMADR ............................................................ 52
NVMADRU ......................................................... 52
2
S Modes................................... 195
 2004 Microchip Technology Inc.