DSPIC30F6011T-20I/PF Microchip Technology, DSPIC30F6011T-20I/PF Datasheet - Page 221

• Manufacturer Part Number: DSPIC30F6011T-20I/PF
• Description: IC DSPIC MCU/DSP 132K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6011T-20I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6011T20IP

Status Bits, Their Significance and the Initialization
Status Bits, Their Significance and the Initialization
Status Register ................................................................... 16
Symbols Used in Opcode Descriptions............................. 158
System Integration ............................................................ 141
T
Table Instruction Operation Summary ................................ 51
Temperature and Voltage Specifications
Timer1 Module .................................................................... 69
Timer2 and Timer3 Selection Mode .................................... 88
Timer2/3 Module ................................................................. 73
Timer4/5 Module ................................................................. 79
Timing Characteristics
 2004 Microchip Technology Inc.
Condition for RCON Register, Case 1 ...................... 150
Condition for RCON Register, Case 2 ...................... 151
Register Map............................................................. 155
AC ............................................................................. 183
16-bit Asynchronous Counter Mode ........................... 69
16-bit Synchronous Counter Mode ............................. 69
16-bit Timer Mode....................................................... 69
Gate Operation ........................................................... 70
Interrupt....................................................................... 71
Operation During Sleep Mode .................................... 70
Prescaler..................................................................... 70
Real-Time Clock ......................................................... 71
Register Map............................................................... 72
16-bit Timer Mode....................................................... 73
32-bit Synchronous Counter Mode ............................. 73
32-bit Timer Mode....................................................... 73
ADC Event Trigger...................................................... 76
Gate Operation ........................................................... 76
Interrupt....................................................................... 76
Operation During Sleep Mode .................................... 76
Register Map............................................................... 77
Timer Prescaler........................................................... 76
Register Map............................................................... 81
A/D Conversion
Bandgap Start-up Time............................................. 189
CAN Module I/O........................................................ 206
CLKOUT and I/O....................................................... 187
DCI Module
External Clock........................................................... 183
I
I
Input Capture (CAPX) ............................................... 192
OC/PWM Module ...................................................... 193
Oscillator Start-up Timer ........................................... 188
Output Compare Module........................................... 192
Power-up Timer ........................................................ 188
Reset......................................................................... 188
SPI Module
2
2
C Bus Data
C Bus Start/Stop Bits
Interrupts............................................................. 71
Oscillator Operation ............................................ 71
Low-speed (ASAM = 0, SSRC = 000) .............. 209
AC-Link Mode ................................................... 196
Multichannel, I
Master Mode ..................................................... 202
Slave Mode ....................................................... 204
Master Mode ..................................................... 202
Slave Mode ....................................................... 204
Master Mode (CKE = 0) .................................... 197
Master Mode (CKE = 1) .................................... 198
Slave Mode (CKE = 0) ...................................... 199
Slave Mode (CKE = 1) ...................................... 200
2
S Modes ................................... 194
dsPIC30F6011/6012/6013/6014
Preliminary
Timing Diagrams
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
Trap Vectors ....................................................................... 48
Traps .................................................................................. 47
U
UART Module
Type A, B and C Timer External Clock..................... 190
Watchdog Timer ....................................................... 188
CAN Bit..................................................................... 116
Frame Sync, AC-Link Start of Frame ....................... 126
Frame Sync, Multi-Channel Mode ............................ 126
I
PWM Output ............................................................... 89
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Bandgap Start-up Time ............................................ 189
Brown-out Reset....................................................... 189
CAN Module I/O ....................................................... 206
CLKOUT and I/O ...................................................... 187
DCI Module
External Clock .......................................................... 184
I
I
Input Capture............................................................ 192
Oscillator Start-up Timer........................................... 189
Output Compare Module .......................................... 192
Power-up Timer ........................................................ 189
Reset ........................................................................ 189
Simple OC/PWM Mode ............................................ 193
SPI Module
Type A Timer External Clock.................................... 190
Type B Timer External Clock.................................... 191
Type C Timer External Clock.................................... 191
Watchdog Timer ....................................................... 189
PLL Clock ................................................................. 185
Hard and Soft ............................................................. 48
Sources ...................................................................... 47
Address Detect Mode ............................................... 107
Auto Baud Support ................................................... 108
Baud Rate Generator ............................................... 107
Enabling and Setting Up........................................... 105
Framing Error (FERR) .............................................. 107
Idle Status................................................................. 107
Loopback Mode ........................................................ 107
Operation During CPU Sleep and Idle Modes.......... 108
Overview................................................................... 103
Parity Error (PERR) .................................................. 107
Receive Break .......................................................... 107
Receive Buffer (UxRXB)........................................... 106
2
2
2
S Interface Frame Sync ......................................... 126
C Bus Data (Master Mode) .................................... 203
C Bus Data (Slave Mode) ...................................... 205
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
AC-Link Mode................................................... 196
Multichannel, I
Master Mode (CKE = 0).................................... 197
Master Mode (CKE = 1).................................... 198
Slave Mode (CKE = 0)...................................... 199
Slave Mode (CKE = 1)...................................... 201
Address Error Trap ............................................. 47
Math Error Trap .................................................. 47
Oscillator Fail Trap ............................................. 48
Stack Error Trap ................................................. 48
2
S Modes................................... 195
DD
) ......................................... 148
DD
DD
), Case 1 ..................... 148
), Case 2 ..................... 148
DS70117E-page 219