DSPIC30F6012T-20I/PF Microchip Technology, DSPIC30F6012T-20I/PF Datasheet - Page 69

• Manufacturer Part Number: DSPIC30F6012T-20I/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012T-20I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012T20IP

8.3
The input change notification module provides the
dsPIC30F devices the ability to generate interrupt
requests to the processor, in response to a change of
state on selected input pins. This module is capable of
detecting input change of states even in Sleep mode,
when the clocks are disabled. There are up to 24 exter-
nal signals (CN0 through CN23) that may be selected
(enabled) for generating an interrupt request on a
change of state.
TABLE 8-10:
TABLE 8-11:
TABLE 8-12:
TABLE 8-13:
 2004 Microchip Technology Inc.
Note: Refer to dsPIC30F Family Reference Manual (DS70046) for descriptions of register bit fields.
CNEN1
CNEN2
CNPU1
CNPU2
Legend:
CNEN1
CNEN2
CNPU1
CNPU2
Legend:
CNEN1
CNEN2
CNPU1
CNPU2
Legend:
CNEN1
CNEN2
CNPU1
CNPU2
Legend:
Name
Name
Name
Name
SFR
SFR
SFR
SFR
Input Change Notification Module
Addr.
Addr.
00C0
00C2
00C4
00C6
00C0
00C2
00C4
00C6
u = uninitialized bit
Addr.
u = uninitialized bit
u = uninitialized bit
Addr.
u = uninitialized bit
00C0
00C2
00C4
00C6
00C0
00C2
00C4
00C6
INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F6011/6012 (BITS 15-8)
INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F6011/6012 (BITS 7-0)
INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F6013/6014 (BITS 15-8)
INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F6013/6014 (BITS 7-0)
CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE
CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE
CN23PUE CN22PUE CN21PUE CN20PUE CN19PUE CN18PUE CN17PUE CN16PUE
CN15IE
CN7PUE
CN15IE
CN7PUE
CN23IE
Bit 15
Bit 15
CN7IE
CN7IE
Bit 7
Bit 7
—
—
—
—
—
—
CN6PUE
CN6PUE
CN14IE
CN14IE
CN22IE
Bit 14
Bit 14
CN6IE
CN6IE
Bit 6
Bit 6
—
—
—
—
—
—
CN5PUE
CN5PUE
dsPIC30F6011/6012/6013/6014
CN13IE
CN13IE
CN21IE
Bit 13
CN5IE
Bit 13
CN5IE
Bit 5
Bit 5
—
—
—
—
—
—
CN4PUE
CN4PUE
CN12IE
CN12IE
CN20IE
CN4IE
CN4IE
Bit 12
Bit 12
Bit 4
Bit 4
Preliminary
—
—
—
—
—
—
CN3PUE
CN3PUE
CN19IE
CN11IE
CN11IE
CN3IE
CN3IE
Bit 11
Bit 11
Bit 3
Bit 3
—
—
—
—
—
—
CN18PUE CN17PUE CN16PUE
CN2PUE
CN2PUE
CN10IE
CN18IE
CN10IE
CN18IE
CN2IE
CN2IE
Bit 10
Bit 10
Bit 2
Bit 2
—
—
—
—
CN1PUE
CN1PUE
CN9PUE
CN9PUE
CN17IE
CN17IE
CN1IE
CN1IE
CN9IE
CN9IE
Bit 9
Bit 1
Bit 9
Bit 1
—
—
—
—
CN8PUE
CN0PUE
CN8PUE
CN0PUE
CN16IE
CN16IE
CN8IE
CN0IE
CN8IE
CN0IE
Bit 8
Bit 0
Bit 8
Bit 0
—
—
—
—
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
DS70117E-page 67
Reset State
Reset State
Reset State
Reset State