PIC18F2515-E/SP Microchip Technology, PIC18F2515-E/SP Datasheet - Page 11
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PIC18F2515-E/SP
Manufacturer Part Number
PIC18F2515-E/SP
Description
IC MCU FLASH 24KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18LF2410-ISO.pdf
(376 pages)
3.PIC18LF2410-ISO.pdf
(8 pages)
4.PIC18F2515-ISO.pdf
(16 pages)
5.PIC18F2515-ISO.pdf
(6 pages)
6.PIC18F2515-ISO.pdf
(8 pages)
Specifications of PIC18F2515-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
2.4
Figure 2-10
programming process. First, a Bulk Erase is performed.
Next, the code memory, ID locations and data EEPROM
are programmed (selected devices only, see
“Data EEPROM
then verified to ensure that programming was successful.
If no errors are detected, the Configuration bits are then
programmed and verified.
FIGURE 2-10:
2010 Microchip Technology Inc.
Note 1:
High-Level Overview of the
Programming Process
shows the high-level overview of the
Selected devices only, see
“Data EEPROM
Programming”). These memories are
Program Data EE
Configuration Bits
Program Memory
Configuration Bits
Verify Program
Perform Bulk
Program IDs
Verify Data
Verify IDs
Program
HIGH-LEVEL
PROGRAMMING FLOW
Erase
Verify
Done
Start
Programming”.
(1)
Section 3.3
Section 3.3
PIC18F2XXX/4XXX FAMILY
2.5
As shown in
Program/Verify mode is entered by holding PGC and
PGD low and then raising MCLR/V
(high voltage). Once in this mode, the code memory,
data EEPROM (selected devices only, see
“Data EEPROM
Configuration bits can be accessed and programmed in
serial fashion.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 2-11:
FIGURE 2-12:
MCLR/V
V
PGD
PGC
MCLR/V
D110
V
PGD
PGC
DD
DD
Entering and Exiting High-Voltage
ICSP Program/Verify Mode
D110
PP
PP
Figure 2-12
/RE3
/RE3
Figure
Programming”), ID locations and
PGD = Input
PGD = Input
P13
P1
ENTERING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
EXITING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
2-11, the High-Voltage ICSP
P16
shows the exit sequence.
P1
P12
P17
DS39622L-page 11
PP
/RE3 to V
Section 3.3
IHH