ATMEGA48V-10PI Atmel, ATMEGA48V-10PI Datasheet - Page 21
![IC AVR MCU 4K 5V 10MHZ 28-DIP](/photos/7/21/72189/453-28-dip_sml.jpg)
ATMEGA48V-10PI
Manufacturer Part Number
ATMEGA48V-10PI
Description
IC AVR MCU 4K 5V 10MHZ 28-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48V-10PI
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA48V-12PI
ATMEGA48V-12PI
ATMEGA48V-12PI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA48V-10PI
Manufacturer:
AGERE
Quantity:
85
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7.6
7.6.1
7.6.2
7.6.3
2545S–AVR–07/10
Register Description
EEARH and EEARL – The EEPROM Address Register
EEDR – The EEPROM Data Register
EECR – The EEPROM Control Register
• Bits 15..9 – Res: Reserved Bits
These bits are reserved bits in the ATmega48/88/168 and will always read as zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
256/512/512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0
and 255/511/511. The initial value of EEAR is undefined. A proper value must be written before
the EEPROM may be accessed.
EEAR8 is an unused bit in ATmega48 and must always be written to zero.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7..6 – Res: Reserved Bits
These bits are reserved bits in the ATmega48/88/168 and will always read as zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in
Bit
0x22 (0x42)
0x21 (0x41)
Read/Write
Initial Value
Bit
0x20 (0x40)
Read/Write
Initial Value
Bit
0x1F (0x3F)
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
15
R
R
–
7
0
X
7
0
7
–
0
EEAR6
R/W
R/W
14
R
R
–
6
0
X
6
0
6
–
0
EEPM1
EEAR5
R/W
R/W
R/W
13
R
5
X
–
5
0
X
5
0
EEPM0
EEAR4
R/W
R/W
R/W
12
X
R
4
–
4
0
X
4
0
EEAR3
EERIE
R/W
R/W
R/W
11
R
3
0
–
3
0
X
3
0
EEMPE
EEAR2
R/W
R/W
R/W
ATmega48/88/168
10
R
–
2
0
X
2
0
2
0
EEAR1
EEPE
R/W
R/W
R/W
R
9
–
1
0
X
1
0
X
1
Table
EEAR8
EEAR0
EERE
7-1. While EEPE
R/W
R/W
LSB
R/W
R/W
X
X
8
0
0
0
0
0
EEARH
EEARL
EEDR
EECR
21
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