AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 9

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AT91SAM7A1-AU

Manufacturer Part Number
AT91SAM7A1-AU
Description
IC ARM7 MCU 32BIT ROMLESS144LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A1-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7A1-AU
Manufacturer:
Atmel
Quantity:
10 000
12. Serial Peripheral Interface (SPI)
13. Controller Area Network (CAN)
14. General-purpose Timer (GPT)
15. Simple Timer (ST)
6048C–ATARM–29-Jun-06
The AT91SAM7A1 features an SPI that provides communication with external devices in master
or slave mode. The SPI has four external chip selects that can be connected to up to 15 devices.
The data length is programmable from 8-bit to 16-bit.
As for the USART, a two-channel PDC is used to move data directly between memory and the
SPI without CPU intervention for maximum real-time processing throughput.
The AT91SAM7A1 provides one CAN (2.0A and 2.0B). These are serial communications proto-
cols that efficiently support distributed real-time control with a very high level of security (16
mailboxes). The main features are:
The AT91SAM7A1 features three general-purpose timers. Each timer can be independently pro-
grammed to perform a wide range of functions including frequency measurement, event
counting, interval measurement, pulse generation, delay timing and pulse width modulation.
Each general-purpose timer has one external clock input, five internal clock inputs, and three
multi-purpose input/output signals that can be configured by the user. Each timer drives an inter-
nal interrupt signal that can be programmed to generate processor interrupts via the GIC
(Generic Interrupt Controller).
Three general-purpose timers are grouped in the same block. This block has two global regis-
ters that act upon all three GPTs. The Block Control Register allows the three timers to be
started simultaneously with the same instruction. The Block Mode Register defines the external
clock inputs for each timer, allowing them to be chained.
Simple Timers provide basic functions for timing calculation. Each channel of this timer has a
specific prescalar and a 16-bit counter. The prescalar defines the clock frequency of the channel
counter. The 16-bit counter starts down-counting when a value different to zero is loaded. An
interrupt is generated when the counter is null.
• Prioritization of messages
• Multi-master
• System wide data consistency
• Error detection and error signaling
• Automatic retransmission of corrupted messages
• Automatic reply after receive a remote frame
• Time stamp on each transfer
• Multicast reception with time synchronization
• Continuous reception mode
AT91SAM7A1
9

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