ATMEGA168-20MI Atmel, ATMEGA168-20MI Datasheet - Page 153
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ATMEGA168-20MI
Manufacturer Part Number
ATMEGA168-20MI
Description
IC AVR MCU 16K 20MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA168-20MI
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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2545S–AVR–07/10
Table 17-3.
Note:
Table 17-4
rect PWM mode.
Table 17-4.
Note:
• Bits 5:4 – COM2B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC2B) behavior. If one or both of the COM2B1:0
bits are set, the OC2B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2B pin
must be set in order to enable the output driver.
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 17-5.
COM2A1
COM2A1
COM2B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
pare Match is ignored, but the set or clear is done at TOP. See
page 147
shows the COM2A1:0 bit functionality when the WGM22:0 bits are set to phase cor-
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
Compare Output Mode, non-PWM Mode
COM2A0
COM2B0
COM2A0
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 17-5
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC0A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match, set OC2A at BOTTOM,
(non-inverting mode)
Set OC2A on Compare Match, clear OC2A at BOTTOM,
(inverting mode)
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC2A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match when up-counting. Set OC2A on
Compare Match when down-counting.
Set OC2A on Compare Match when up-counting. Clear OC2A on
Compare Match when down-counting.
Description
Normal port operation, OC2B disconnected.
Toggle OC2B on Compare Match
Clear OC2B on Compare Match
Set OC2B on Compare Match
shows the COM2B1:0 bit functionality when the WGM22:0 bits
(1)
ATmega48/88/168
(1)
“Fast PWM Mode” on page 145
“Phase Correct PWM Mode” on
153
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