AT89LP2052-16XU Atmel, AT89LP2052-16XU Datasheet - Page 60

IC 8051 MCU FLASH 2K 20TSSOP

AT89LP2052-16XU

Manufacturer Part Number
AT89LP2052-16XU
Description
IC 8051 MCU FLASH 2K 20TSSOP
Manufacturer
Atmel
Series
89LPr
Datasheets

Specifications of AT89LP2052-16XU

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP2052-16XU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Figure 23-3. Parallel Write Command Sequence
Figure 23-4. Parallel Read Command Sequence
60
AT89LP2052/LP4052
XTAL1
XTAL1
CS
CS
P1
P1
Figure 23-2. Flash Parallel Programming Device Connections
Note:
While CS is high, the interface is reset to its default state and P1 is tri-stated. CS should be
brought low before the first byte of a command is issued, and should return high only after the
last byte of the command has been strobed.
mand sequence. Command, address, and data bytes are sampled from P1 on the rising edge of
the XTAL1 pulse.
and address bytes are sampled from P1 on the rising edge of the XTAL1 pulse. At the falling
edge of the fourth XTAL1 pulse the device enables P1 to output data. The data remains on P1
until CS is brought high. During reads the parallel programmer should tri-state P1 before the
negative edge of the fourth XTAL1 pulse to avoid bus contention.
AAh
AAh
Sampling of pin P3.1 (RDY/BSY) is optional. During Parallel Programming, P3.1 will be pulled low
while the device is busy. Note that it does not require an external passive pull-up to V
R DY/BSY
Figure 23-4
OPCODE
OPCODE
CS
shows a generic parallel read command sequence. Command
ADDRH
ADDRH
AT89LP2052/LP4052
P3.1
P3.2
X TAL 1
GND
Figure 23-3
ADDRL
ADDRL
VCC
RST
P1
shows a generic parallel write com-
DATAIN
2.7 to 5.5V
DATAOUT
DATA
V PP
3547J–MICRO–10/09
CC
.

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