ATMEGA88P-20MU Atmel, ATMEGA88P-20MU Datasheet - Page 36
![MCU AVR 8K ISP FLASH 20MHZ 32QFN](/photos/12/43/124398/atmega88p-20mu_sml.jpg)
ATMEGA88P-20MU
Manufacturer Part Number
ATMEGA88P-20MU
Description
MCU AVR 8K ISP FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA88P-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32MLF
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA88P-20MU
Manufacturer:
ATMEL
Quantity:
12 246
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8.9
8.10
8.11
8025L–AVR–7/10
Clock Output Buffer
Timer/Counter Oscillator
System Clock Prescaler
Table 8-16.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
36
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT
Fuse has to be programmed. This mode is suitable when the chip clock is used to drive other cir-
cuits on the system. The clock also will be output during reset, and the normal operation of I/O
pin will be overridden when the fuse is programmed. Any clock source, including the internal RC
Oscillator, can be selected when the clock is output on CLKO. If the System Clock Prescaler is
used, it is the divided system clock that is output.
ATmega48P/88P/168P uses the same crystal oscillator for Low-frequency Oscillator and
Timer/Counter Oscillator. See
oscillator and crystal requirements.
ATmega48P/88P/168P share the Timer/Counter Oscillator Pins (TOSC1 and TOSC2) with
XTAL1 and XTAL2. When using the Timer/Counter Oscillator, the system clock needs to be four
times the oscillator frequency. Due to this and the pin sharing, the Timer/Counter Oscillator can
only be used when the Calibrated Internal RC Oscillator is selected as system clock source.
Applying an external clock source to TOSC1 can be done if EXTCLK in the ASSR Register is
written to logic one. See
description on selecting external clock as input instead of a 32.768 kHz watch crystal.
The ATmega48P/88P/168P has a system clock prescaler, and the system clock can be divided
by setting the
decrease the system clock frequency and the power consumption when the requirement for pro-
cessing power is low. This can be used with all clock source options, and it will affect the clock
frequency of the CPU and all synchronous peripherals. clk
divided by a factor as shown in
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occurs in the clock system. It also ensures that no intermediate frequency is higher than
BOD enabled
Fast rising power
Slowly rising power
for details.
Power Conditions
Start-up Times for the External Clock Selection
”CLKPR – Clock Prescale Register” on page
”Asynchronous Operation of Timer/Counter2” on page 153
Start-up Time from Power-
”Low Frequency Crystal Oscillator” on page 33
Table 28-3 on page
down and Power-save
Reserved
6 CK
6 CK
6 CK
314.
ATmega48P/88P/168P
I/O
Additional Delay from
”System Clock Prescaler” on page
387. This feature can be used to
, clk
Reset (V
14CK + 4.1 ms
14CK + 65 ms
ADC
14CK
, clk
CC
= 5.0V)
CPU
, and clk
for details on the
for further
SUT[1:0]
FLASH
00
01
10
11
are
36
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