AT91SAM7S32-AU-999 Atmel, AT91SAM7S32-AU-999 Datasheet - Page 477

• Manufacturer Part Number: AT91SAM7S32-AU-999
• Description: IC MCU ARM7 32KB FLASH 48LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S32-AU-999

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

34. Pulse Width Modulation Controller (PWM)
34.1
34.2
6175K–ATARM–30-Aug-10
overview
Block Diagram
The PWM macrocell controls several channels independently. Each channel controls one
square output waveform. Characteristics of the output waveform such as period, duty-cycle and
polarity are configurable through the user interface. Each channel selects and uses one of the
clocks provided by the clock generator. The clock generator provides several clocks resulting
from the division of the PWM macrocell master clock.
All PWM macrocell accesses are made through APB mapped registers.
Channels can be synchronized, to generate non overlapped waveforms. All channels integrate a
double buffering system in order to prevent an unexpected output waveform while modifying the
period or the duty-cycle.
Figure 34-1. Pulse Width Modulation Controller Block Diagram
PMC
MCK
Clock Generator
AT91SAM7S Series Preliminary
Channel
Channel
Selector
Selector
PWMx
PWM0
Clock
Clock
APB Interface
Controller
PWM
Duty Cycle
Duty Cycle
Counter
Counter
Update
Update
APB
Period
Period
Comparator
Comparator
Interrupt Generator
PIO
AIC
PWM0
PWM0
PWMx
PWMx
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