ADUC812BS Analog Devices Inc, ADUC812BS Datasheet - Page 23

IC ADC 12BIT MULTICH MCU 52-MQFP

ADUC812BS

Manufacturer Part Number
ADUC812BS
Description
IC ADC 12BIT MULTICH MCU 52-MQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC812BS

Rohs Status
RoHS non-compliant
Core Processor
8052
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
34
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
640 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-MQFP, 52-PQFP

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To drive significant loads with the DAC outputs, external
buffering may be required, as illustrated in Figure 22.
The DAC output buffer also features a high impedance disable
function. In the chip’s default power-on state, both DACs are
disabled, and their outputs are in a high impedance state (or
“three-state”) where they remain inactive until enabled in software.
This means that if a zero output is desired during power-up or
power-down transient conditions, then a pull-down resistor must
be added to each DAC output. Assuming this resistor is in place,
REV. E
Figure 21. Source and Sink Current Capability with
V
REF
= V
3
2
1
0
0
Figure 22. Buffering the DAC Outputs
DD
= 3 V
SOURCE/SINK CURRENT – mA
5
10
9
10
ADuC812
15
–23–
the DAC outputs will remain at ground potential whenever the
DAC is disabled. However, each DAC output will still spike
briefly when power is first applied to the chip, and again when
each DAC is first enabled in software. Typical scope shots of
these spikes are given in Figure 23 and Figure 24, respectively.
Figure 23. DAC Output Spike at Chip Power-Up
Figure 24. DAC Output Spike at DAC Enable
5
200 s/DIV
s/DIV, 1V/DIV
DAC OUT – 500mV/DIV
AV
DD
ADuC812
– 2V/DIV

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