EP7312-IV Cirrus Logic Inc, EP7312-IV Datasheet - Page 40
![IC ARM720T MCU 74MHZ 208-LQFP](/photos/12/44/124402/ep7312-iv_sml.jpg)
EP7312-IV
Manufacturer Part Number
EP7312-IV
Description
IC ARM720T MCU 74MHZ 208-LQFP
Manufacturer
Cirrus Logic Inc
Series
EP7r
Datasheet
1.EP7312-CVZ.pdf
(64 pages)
Specifications of EP7312-IV
Core Processor
ARM7
Core Size
32-Bit
Speed
74MHz
Connectivity
Codec, DAI, EBI/EMI, IrDA, Keypad, SPI/Microwire1, UART/USART
Peripherals
LCD, LED, MaverickKey, PWM
Number Of I /o
27
Program Memory Type
ROMless
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 2.7 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
For Use With
598-1209 - KIT DEVELOPMENT EP73XX ARM7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
598-1245
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP7312-IV-90
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
EP7312
High-Performance, Low-Power System on Chip
204-Ball TFBGA Ball Listing
The list is ordered by ball location.
40
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
Ball Location
VDDIO
EXPCLK
nCS[3]
nCS[1]
nMWE/nSDWE
SDQM[2]
nSDCS[1]
DD[2]
FRM
CL[1]
VSSCORE
D[1]
A[2]
D[4]
A[5]
nPWRFL
MOSCOUT
VSSIO
VSSIO
VSSIO
WORD
VDDIO
nCS[5]
nCS[2]
nMOE/nSDCAS
SDCKE
nSDCS[0]
DD[1]
M
CL[2]
D[0]
A[1]
D[3]
Name
Strength
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
1
2
1
1
1
1
1
2
2
†
©
Table 21. 204-Ball TFBGA Ball Listing
Copyright Cirrus Logic, Inc. 2005
Reset
State
High
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
(All Rights Reserved)
Core ground
Pad ground
Pad ground
Pad ground
Pad power
Pad power
Type
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
0
I
I
Digital I/O power,
3.3 V
Expansion clock input
Chip select 3
Chip select 1
ROM, expansion write enable/ SDRAM write enable control signal
SDRAM byte lane mask
SDRAM chip select 2
LCD serial display data
LCD frame synchronization pulse
LCD line clock
Core ground
Data I/O
System byte address
Data I/O
System byte address
Power fail sense input
Main oscillator out
I/O ground
I/O ground
I/O ground
Word access select output
Digital I/O power, 3.3 V
Chip select 5
Chip select 2
ROM, expansion OP enable/SDRAM CAS control signal
SDRAM clock enable output
SDRAM chip select 0
LCD serial display data
LCD AC bias drive
LCD pixel clock out
Data I/O
System byte address
Data I/O
Description
DS508F1