Z86E4312PSC Zilog, Z86E4312PSC Datasheet - Page 45

IC MICROCONTROLLER 4K 40-DIP

Z86E4312PSC

Manufacturer Part Number
Z86E4312PSC
Description
IC MICROCONTROLLER 4K 40-DIP
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86E4312PSC

Core Processor
Z8
Core Size
8-Bit
Speed
12MHz
Connectivity
EBI/EMI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
236 x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.620", 15.75mm)
For Use With
309-1034 - ADAPTER 40-DIP ZIF TO 44-QFP309-1033 - ADAPTER 40-DIP TO 44-QFP309-1030 - ADAPTER 40-DIP TO 44-PLCC309-1029 - ADAPTER 40-DIP ZIF TO 44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
269-1037
PS022901-0508
Port 1 can be placed in the high-impedance state along with Port 0, AS, DS, and R/W,
allowing the Z86E43/743/E44 to share common resources in multiprocessor and DMA
applications. In ROM mode, Port 1 is defined as input after reset.
Port 2 (P27-P20). Port 2 is an 8-bit, bidirectional, CMOS-compatible I/O port. These
eight I/O lines can be configured under software control as an input or output, indepen-
dently. All input buffers are Schmitt-triggered. Bits programmed as outputs can be glo-
bally programmed as either push-pull or open-drain. Low EMI output buffers can be
globally programmed by the software. When used as an I/O port, Port 2 can be placed
under handshake control. After reset, Port 2 is defined as an input.
Figure 19. Port 1 Configuration (Z86E43/743/E44 Only)
Open Drain
Open
Out
In
MCU
1.5
2.3 Hysteresis
R ~ ~ 500 kΩ
Handshake Controls
DAV1 and RDY1
(P33 and P34)
Port 2 (I/O)
CMOS Z8
Auto Latch
PAD
®
Product Specification
OTP Microcontrollers
Electrical Characteristics
41

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