Z86D7308VSC1987 Zilog, Z86D7308VSC1987 Datasheet - Page 39

IC 32K OTP 3 VOLT 44-PLCC

Z86D7308VSC1987

Manufacturer Part Number
Z86D7308VSC1987
Description
IC 32K OTP 3 VOLT 44-PLCC
Manufacturer
Zilog
Series
Z8® IRr
Datasheet

Specifications of Z86D7308VSC1987

Core Processor
Z8
Core Size
8-Bit
Speed
8MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
236 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
PS019401-1102
Register Description
Note:
Note:
LVD(D)0Ch Low-Voltage Detection Register
HI8(D)0Bh
This register holds the captured data from the output of the 8-bit Counter/Timer0.
Typically, this register is used to hold the number of counts when the input signal
is 1.
L08(D)0Ah
This register holds the captured data from the output of the 8-bit Counter/Timer0.
Typically, this register is used to hold the number of counts when the input signal
is 0.
Field
LVD
*
Field
T8_Capture_HI
Field
T8_Capture_L0
Default after POR
The LVD flag will be valid after enabling the detection for 20 S (design
estimation, not tested in production). LVD does not work at STOP mode. It
must be disabled during STOP mode in order to reduce current.
Do not modify register P01M while checking a low-voltage condition.
Switching noise of both ports 0 and 1 together might trigger the LVD flag.
Bit Position
765432--
------1-
-------0
Bit Position
76543210
Bit Position
76543210
P
R
R
R/W
E
L
1
0*
1
0*
I
W
W
R
R
M
Description
Captured Data
No Effect
Description
Captured Data
No Effect
Description
Reserved
No Effect
LV flag set
LV flag reset
Enable LVD
Disable LVD
I
N
A
40/44/48-Pin Low-Voltage IR OTP
R
Y
Z86D73
33

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