Z8F6401AN020SC00TR Zilog, Z8F6401AN020SC00TR Datasheet - Page 133

• Manufacturer Part Number: Z8F6401AN020SC00TR
• Description: IC ENCORE MCU FLASH 64K 44LQFP
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F6401AN020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F6401AN020SC00T

PS017609-0803
Reading a Transaction with a 7-Bit Address
S
7. The I
8. After one bit of address is shifted out by the SDA signal, the Transmit interrupt is
9. Software responds by writing the second byte of address into the contents of the I
10. The I
11. The I
12. The I
13. The I
14. Software responds by writing the data to be written out to the I
15. The I
16. The I
17. The I
18. Software responds by asserting the STOP bit of the I
19. The I
20. The I
Figure 81 illustrates the data transfer format for a receive operation on a 7-bit addressed
slave. The shaded regions indicate data transferred from the I
unshaded regions indicate data transferred from the slaves to the I
Figure 81. Receive Data Transfer Format for a 7-Bit Addressed Slave
The data transfer format for a receive operation on a 7-bit addressed slave is as follows:
register.
asserted.
Data register.
SDA signal.
high period of SCL. The I
I
sent, the Transmit interrupt is asserted.
signal.
high period of SCL. The I
Transmit interrupt is asserted.
Slave Address
2
C Data register.
2
2
2
2
2
2
2
2
2
2
C Controller loads the I
C Controller shifts the rest of the first byte of address and write bit out by the
C slave sends an acknowledge by pulling the SDA signal low during the next
C Controller loads the contents of the I
C Controller shifts the data out by the SDA signal. After the first bit has been
C Controller shifts out the rest of the second byte of slave address by the SDA
C slave sends an acknowledge by pulling the SDA signal low during the next
C Controller shifts the data out by the SDA signal. After the first bit is sent, the
C Controller completes transmission of the data on the SDA signal.
C Controller sends the STOP condition to the I
R=1
2
2
C Controller sets the ACK bit in the I
C Controller sets the ACK bit in the I
2
C Shift register with the contents of the I
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
A
Data
2
C Shift register with the contents of the
2
2
C Control register.
A
C bus.
2
C Controller to slaves and
2
Data
C Controller.
2
2
C Control register.
2
C Status register.
C Status register.
Z8 Encore!
2
I2C Controller
C Data
A
2
C
P
®
115