MC68HC11K1CFN4 Freescale Semiconductor, MC68HC11K1CFN4 Datasheet - Page 12

• Manufacturer Part Number: MC68HC11K1CFN4
• Description: IC MCU 640 EEPROM 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11K1CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

RBOOT — Read Bootstrap ROM/EPROM
SMOD and MDA —Special Mode Select and Mode Select A
PSEL[4:0] —Priority Select Bits [4:0]
OPT2 — System Configuration Options 2
LIRDV —LIR Driven
CWOM —Port C Wired-OR Mode
Bit 5 —Not implemented
IRVNE —Internal Read Visibility/Not E
12
MOTOROLA
RESET:
Valid only when SMOD is set (bootstrap or special test mode). Can only be written in special modes.
These two bits can be read at any time. They can be written anytime in special modes. MDA can only
be written once in normal modes. SMOD cannot be set once it has been cleared.
Refer to 5 Resets and Interrupts.
*Can be written only once in normal modes. Can be written anytime in special modes.
In single-chip and bootstrap modes, this bit has no meaning or effect. The LIR pin is normally configured
for wired-OR operation (only pulls low). In order to detect consecutive instructions in a high-speed ap-
plication, this signal can be made to drive high for a short time to prevent false triggering.
Refer to 6 Parallel Input/Output.
Always read zero
IRVNE can be written only once in normal modes (SMOD = 0). In special modes IRVNE can be written
any time. In special test mode, IRVNE is reset to one. In all other modes, IRVNE is reset to zero.
In expanded modes this bit determines whether IRV is on or off.
In single-chip modes this bit determines whether the E clock drives out from the chip.
Single Chip
Expanded
Boot
Special Test
0 = Bootstrap ROM disabled and not in map
1 = Bootstrap ROM enabled and in map at $BE00–$BFFF
0 = LIR not driven high out of reset
1 = LIR driven high for one quarter cycle to reduce transition time
0 = No internal read visibility on external bus
1 = Data from internal reads is driven out the external data bus.
0 = E is driven out from the chip.
1 = E pin is driven low. Refer to the following table.
Mode
LIRDV
Bit 7
MODB
0
1
1
0
0
Inputs
IRVNE Out
CWOM
of Reset
6
0
MODA
Freescale Semiconductor, Inc.
0
0
0
1
0
1
0
1
For More Information On This Product,
—
5
0
E Clock Out
Go to: www.freescale.com
of Reset
On
On
On
On
IRVNE*
—
4
Special Test
Single Chip
Expanded
Bootstrap
Mode
LSBF
IRV Out of
3
0
Reset
Off
Off
Off
On
SPR2
2
0
Affects Only
SMOD
Latched at Reset
IRVNE
0
0
1
1
IRV
IRV
XDV1
E
E
1
0
MDA
M68HC11 K Series
0
1
0
1
XDV0
$0038
MC68HC11KTS/D
Bit 0
IRVNE Can
Be Written
0
Anytime
Anytime
Once
Once