MC68HC11F1CFN2 Freescale Semiconductor, MC68HC11F1CFN2 Datasheet - Page 93

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MC68HC11F1CFN2

Manufacturer Part Number
MC68HC11F1CFN2
Description
IC MCU 512 EEPROM 2MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11F1CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC11F1CFN2
Manufacturer:
MOT
Quantity:
90
Part Number:
MC68HC11F1CFN2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
RWU — Receiver Wakeup Control
SBK — Send Break
7.6.4 Serial Communication Status Register
SCSR — SCI Status Register
TDRE — Transmit Data Register Empty Flag
TC — Transmit Complete Flag
RDRF — Receive Data Register Full Flag
IDLE — Idle Line Detected Flag
TECHNICAL DATA
RESET:
At least one character time of break is queued and sent each time SBK is written to
one. As long as the SBK bit is set, break characters are queued and sent. More than
one break may be sent if the transmitter is idle at the time the SBK bit is toggled on
and off, as the baud rate clock edge could occur between writing the one and writing
the zero to SBK.
The SCSR provides inputs to the interrupt logic circuits for generation of the SCI sys-
tem interrupt.
This flag is set when SCDR is empty. Clear the TDRE flag by reading SCSR and then
writing to SCDR.
This flag is set when the transmitter is idle (no data, preamble, or break transmission
in progress). Clear the TC flag by reading SCSR and then writing to SCDR.
This flag is set if a received character is ready to be read from SCDR. Clear the RDRF
flag by reading SCSR and then reading SCDR.
This flag is set if the RxD line is idle. Once cleared, IDLE is not set again until the RxD
line has been active and becomes idle again. The IDLE flag is inhibited when RWU =
1. Clear IDLE by reading SCSR and then reading SCDR.
0 = Normal SCI receiver
1 = Wakeup enabled and receiver interrupts inhibited
0 = Break generator off
1 = Break codes generated
0 = SCDR busy
1 = SCDR empty
0 = Transmitter busy
1 = Transmitter idle
0 = SCDR empty
1 = SCDR full
0 = RxD line is active
1 = RxD line is idle
TDRE
Bit 7
1
TC
6
1
Freescale Semiconductor, Inc.
For More Information On This Product,
SERIAL COMMUNICATIONS INTERFACE
RDRF
5
0
Go to: www.freescale.com
IDLE
4
0
OR
0
3
NF
2
0
FE
1
0
Bit 0
0
$102E
7-7

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