MC68HC908GR8CDW Freescale Semiconductor, MC68HC908GR8CDW Datasheet - Page 196
MC68HC908GR8CDW
Manufacturer Part Number
MC68HC908GR8CDW
Description
IC MCU 8K FLASH 8MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68HC908GR4CFAE.pdf
(408 pages)
Specifications of MC68HC908GR8CDW
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Monitor ROM (MON)
15.4.2 Data Format
15.4.3 Break Signal
Technical Data
196
Table 15-2
mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. Transmit and receive baud rates must
be identical.
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When
the monitor receives a break signal, it drives the PTA0 pin high for the
duration of two bits and then echoes back the break signal.
Freescale Semiconductor, Inc.
START
Monitor
Modes
BIT
For More Information On This Product,
User
0
BIT 0
1
summarizes the differences between user mode and monitor
Go to: www.freescale.com
2
MISSING STOP BIT
Monitor ROM (MON)
BIT 1
3
Vector
$FFFE
$FEFE
Reset
High
Figure 15-3. Monitor Data Format
Figure 15-4. Break Transaction
4
Table 15-2. Mode Differences
BIT 2
5
6
Vector
$FEFF
$FFFF
BIT 3
Reset
Low
7
BIT 4
$FEFC
Vector
$FFFC
Break
High
BIT 5
Functions
2-STOP BIT DELAY BEFORE ZERO ECHO
BIT 6
0
$FEFD
Vector
$FFFD
Break
Low
MC68HC908GR8 — Rev 4.0
1
BIT 7
2
3
STOP
$FEFC
Vector
$FFFC
BIT
High
SWI
4
START
NEXT
5
BIT
MOTOROLA
6
Vector
$FFFD
$FEFD
Low
SWI
7
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