MC68HC908MR8CP Freescale Semiconductor, MC68HC908MR8CP Datasheet - Page 113

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MC68HC908MR8CP

Manufacturer Part Number
MC68HC908MR8CP
Description
IC MCU 8K FLASH 8MHZ PWM 28-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908MR8CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Part Number:
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8.4 Functional Description
8.4.1 Crystal Oscillator Circuit
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
The CGM consists of three major submodules:
Figure 8-1
The crystal oscillator circuit consists of an inverting amplifier and an
external crystal. The OSC1 pin is the input to the amplifier and the OSC2
pin is the output. The SIMOSCEN signal from the system integration
module (SIM) enables the crystal oscillator circuit.
The CGMXCLK signal is the output of the crystal oscillator circuit and
runs at a rate equal to the crystal frequency. CGMXCLK is then buffered
to produce CGMRCLK, the PLL reference clock.
CGMXCLK can be used by other modules which require precise timing
for operation. The duty cycle of CGMXCLK is not guaranteed to be
50 percent and depends on external factors, including the crystal and
related external components.
An externally generated clock also can feed the OSC1 pin of the crystal
oscillator circuit. Connect the external clock to the OSC1 pin and let the
OSC2 pin float.
1. Crystal oscillator circuit — The crystal oscillator circuit generates
2. Phase-locked loop (PLL) — The PLL generates the
3. Base clock selector circuit — This software-controlled circuit
the constant crystal frequency clock, CGMXCLK.
programmable VCO frequency clock, CGMVCLK.
selects either CGMXCLK divided by two or the VCO clock,
CGMVCLK, divided by two as the base clock, CGMOUT. The SIM
derives the system clocks from CGMOUT.
Clock Generator Module (CGM)
shows the structure of the CGM.
Clock Generator Module (CGM)
Functional Description
Technical Data
113

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