C8051F019 Silicon Laboratories Inc, C8051F019 Datasheet - Page 6
![IC 8051 MCU 16K FLASH 48TQFP](/photos/15/92/159280/tqfp-48_sml.jpg)
C8051F019
Manufacturer Part Number
C8051F019
Description
IC 8051 MCU 16K FLASH 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Specifications of C8051F019
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
16 bit
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F019
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F019-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F019-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F019R
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
19. JTAG (IEEE 1149.1) ......................................................................................................... 147
Figure 18.3. PCA Capture Mode Diagram ......................................................................................................139
Figure 18.4. PCA Software Timer Mode Diagram..........................................................................................140
Figure 18.5. PCA High Speed Output Mode Diagram....................................................................................140
Figure 18.6. PCA PWM Mode Diagram .........................................................................................................141
18.2. PCA Counter/Timer...............................................................................................................................142
Table 18.2. PCA Timebase Input Options.......................................................................................................142
Figure 18.7. PCA Counter/Timer Block Diagram...........................................................................................142
18.3. Register Descriptions for PCA ..............................................................................................................143
Figure 18.8. PCA0CN: PCA Control Register .................................................................................................143
Figure 18.9. PCA0MD: PCA Mode Register ..................................................................................................144
Figure 18.10. PCA0CPMn: PCA Capture/Compare Registers........................................................................145
Figure 18.11. PCA0L: PCA Counter/Timer Low Byte ...................................................................................146
Figure 18.12. PCA0H: PCA Counter/Timer High Byte ..................................................................................146
Figure 18.13. PCA0CPLn: PCA Capture Module Low Byte ..........................................................................146
Figure 18.14. PCA0CPHn: PCA Capture Module High Byte.........................................................................146
Figure 19.1. IR: JTAG Instruction Register ....................................................................................................147
19.1. Boundary Scan.......................................................................................................................................148
Table 19.1. Boundary Data Register Bit Definitions.......................................................................................148
Figure 19.2. DEVICEID: JTAG Device ID Register ......................................................................................149
19.2. Flash Programming Commands.............................................................................................................150
Figure 19.3. FLASHCON: JTAG Flash Control Register...............................................................................151
Figure 19.4. FLASHADR: JTAG Flash Address Register..............................................................................151
Figure 19.5. FLASHDAT: JTAG Flash Data Register....................................................................................152
Figure 19.6. FLASHSCL: JTAG Flash Scale Register ...................................................................................152
19.3. Debug Support.......................................................................................................................................153
Rev. 1.2
C8051F018
C8051F019
6