C8051F121 Silicon Laboratories Inc, C8051F121 Datasheet - Page 137
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C8051F121
Manufacturer Part Number
C8051F121
Description
IC 8051 MCU FLASH 128K 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Specifications of C8051F121
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Automatic hardware switching of the SFR Page on interrupts may be enabled or disabled as desired using
the SFR Automatic Page Control Enable Bit located in the SFR Page Control Register (SFRPGCN). This
function defaults to ‘enabled’ upon reset. In this way, the autoswitching function will be enabled unless dis-
abled in software.
A summary of the SFR locations (address and SFR page) is provided in Table 11.2. in the form of an SFR
memory map. Each memory location in the map has an SFR page row, denoting the page in which that
SFR resides. Note that certain SFR’s are accessible from ALL SFR pages, and are denoted by the “ (ALL
PAGES) ” designation. For example, the Port I/O registers P0, P1, P2, and P3 all have the “ (ALL PAGES) ”
designation, indicating these SFR’s are accessible from all SFR pages regardless of the SFRPAGE regis-
ter value.
CIP-51
Interrupt
Logic
Figure 11.4. SFR Page Stack
SFRPGCN Bit
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
SFRPAGE
SFRNEXT
SFRLAST
C8051F130/1/2/3
137
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