C8051F121 Silicon Laboratories Inc, C8051F121 Datasheet - Page 257
C8051F121
Manufacturer Part Number
C8051F121
Description
IC 8051 MCU FLASH 128K 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Specifications of C8051F121
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Bits7–0: P7.[7:0]: Port7 Output Latch Bits.
Bits7–0: P7MDOUT.[7:0]: Port7 Output Mode Bits.
Note:
P7.7
R/W
R/W
Bit7
Bit7
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (Open-Drain if corresponding P7MDOUT bit = 0). See SFR Definition
18.20.
Read - Returns states of I/O pins.
0: P7.n pin is logic low.
1: P7.n pin is logic high.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
P7.[7:0] can be driven by the External Data Memory Interface (as AD[7:0] in Multiplexed
mode, or as D[7:0] in Non-multiplexed mode). See
Interface and On-Chip XRAM” on page 219
Interface.
P7.6
R/W
R/W
Bit6
Bit6
SFR Definition 18.20. P7MDOUT: Port7 Output Mode
P7.5
R/W
R/W
Bit5
Bit5
SFR Definition 18.19. P7: Port7 Data
P7.4
R/W
R/W
Bit4
Bit4
Rev. 1.4
P7.3
R/W
R/W
Bit3
Bit3
C8051F120/1/2/3/4/5/6/7
for more information about the External Memory
P7.2
R/W
R/W
Bit2
Bit2
Section “17. External Data Memory
C8051F130/1/2/3
P7.1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
P7.0
R/W
R/W
Bit0
Bit0
0xF8
F
0x9F
F
Addressable
00000000
Reset Value
Reset Value
11111111
Bit
257
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