HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 229
HD64F2134FA20
Manufacturer Part Number
HD64F2134FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2134FA20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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7.3.3
Figure 7.4 shows the correspondence between DTC vector addresses and register information.
Table 7.4 shows the correspondence between activation sources, vector addresses, and DTCER
bits. When the DTC is activated by software, the vector address is obtained from: H'0400 +
DTVECR[6:0] << 1 (where << 1 indicates a 1-bit left shift). For example, if DTVECR is H'10, the
vector address is H'0420.
The DTC reads the start address of the register information from the vector address set for each
activation source, and then reads the register information from that start address. The register
information can be placed at predetermined addresses in the on-chip RAM. The start address of
the register information should be an integral multiple of four.
The configuration of the vector address is the same in both normal and advanced modes, a 2-byte
unit being used in both cases. These two bytes specify the lower bits of the address in the on-chip
RAM.
Figure 7.4 Correspondence between DTC Vector Address and Register Information
DTC vector
address
DTC Vector Table
Register information
start address
Section 7 Data Transfer Controller [H8S/2138 Group]
Chain transfer
Rev. 4.00 Jun 06, 2006 page 173 of 1004
Register information
REJ09B0301-0400
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