M30291FATHP Renesas Electronics America, M30291FATHP Datasheet - Page 114

IC M16C MCU FLASH 96K 64LQFP

M30291FATHP

Manufacturer Part Number
M30291FATHP
Description
IC M16C MCU FLASH 96K 64LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheets

Specifications of M30291FATHP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
55
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
[ Syntax ]
[ Selectable src/dest ]
[ Flag Change ]
MUL
[ Operation ]
[ Function ]
[ Description Example ]
[ Related Instructions ]
Chapter 3 Functions
*1 If you specify (.B) for the size specifier (.size), you cannot choose A0 or A1 for src and dest simulta-
Change
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0
MUL.size
dest
Flag
• This instruction multiplies src and dest together including the sign bits and stores the result in dest .
• If you selected (.B) for the size specifier (.size), src and dest both are operated on in 8 bits and the
• If you selected (.W) for the size specifier (.size), src and dest both are operated on in 16 bits and the
MUL.B
MUL.W
MUL.B
MUL.W
neously.
result is stored in 16 bits. If you specified an A0 or A1 for either src or dest , operation is performed on
the 8 low-order bits of A0 or A1.
result is stored in 32 bits. If you specified R0, R1, or A0 for dest , the result is stored in R2R0, R3R1, or
A1A0 accordingly.
*1
U
dest
R0H/R1
A1/A1
dsp:8[A1]
R3R1
I
src,dest
A0,R0L
#3,R0
R0L,R1L
A0,Ram
O
*1
B
src
src
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
S
DIV,DIVU,DIVX,MULU
Z
D
R1H/R3
[A1]
dsp:8[FB] dsp:8[A0]
abs16
#IMM
C
B , W
Signed multiply
MULtiple
96
R0L/R0
A0/A0
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0
; R0L and A0’s 8 low-order bits are multiplied.
*1
R0H/R1
A1/A1
dsp:8[A1]
R3R1
[ Instruction Code/Number of Cycles ]
dest
R1L/R2
[A0]
dsp:8[SB]
A1A0
R1H/R3
[A1]
dsp:8[FB]
3.2 Functions
MUL
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