MC68HC908AP8CB Freescale Semiconductor, MC68HC908AP8CB Datasheet - Page 250

• Manufacturer Part Number: MC68HC908AP8CB
• Description: IC MCU 8K FLASH 8MHZ 42SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908AP8CB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Analog-to-Digital Converter (ADC)
15.3 Functional Description
The ADC provides eight pins for sampling external sources at pins PTA0/ADC0–PTA7/ADC7. An analog
multiplexer allows the single ADC converter to select one of eight ADC channels as ADC voltage in
(V
When the conversion is completed, ADC places the result in the ADC data register, high and low byte
(ADRH0 and ADRL0), and sets a flag or generates an interrupt.
An additional three ADC data registers (ADRL1–ADRL3) are available to store the individual converted
data for ADC channels ADC1–ADC3 when the auto-scan mode is enabled. Data from channel ADC0 is
stored in ADRL0 in the auto-scan mode.
Figure 15-2
15.3.1 ADC Port I/O Pins
PTA0–PTA7 are general-purpose I/O pins that are shared with the ADC channels. The channel select
bits, ADCH[4:0], define which ADC channel/port pin will be used as the input signal. The ADC overrides
the port I/O logic by forcing that pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O. Writes to the port data register
or data direction register will not have any affect on the port pin that is selected by the ADC. Read of a
port pin which is in use by the ADC will return the pin condition if the corresponding DDR bit is at logic 0.
If the DDR bit is at logic 1, the value in the port data latch is read.
15.3.2 Voltage Conversion
When the input voltage to the ADC equals V
input voltage equals V
straight-line linear conversion. All other input voltages will result in $3FF if greater than V
if less than V
248
$005C
$005D
$005E
ADIN
). V
ADC Data Register Low 2
ADC Data Register Low 3
ADIN
ADC Auto-scan Control
shows the structure of the ADC module.
REFL
is converted by the successive approximation register-based analog-to-digital converter.
.
(ADASCR)
(ADRL3)
(ADRL3)
Register
Input voltage should not exceed the analog supply voltages.
REFL
, the ADC converts it to $000. Input voltages between V
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 15-1. ADC I/O Register Summary
MC68HC908AP Family Data Sheet, Rev. 4
AD9
AD9
R
R
0
0
0
0
= Unimplemented
REFH
AD8
AD8
R
R
0
0
0
0
NOTE
, the ADC converts the signal to $3FF (full scale). If the
AD7
AD7
R
R
0
0
0
0
AD6
AD6
R
R
0
0
0
0
AD5
AD5
R
R
R
0
0
0
0
= Reserved
AUTO1
AD4
AD4
R
R
0
0
0
REFH
Freescale Semiconductor
and V
AUTO0
REFH
AD3
AD3
R
R
0
0
0
REFL
and $000
ASCAN
AD2
AD2
are a
R
R
0
0
0