MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 160

• Manufacturer Part Number: MCHC908GR8AVFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

System Integration Module (SIM)
14.3 Reset and System Initialization
The MCU has these reset sources:
All of these resets produce the vector $FFFE:$FFFF ($FEFE:$FEFF in monitor mode) and assert the
internal reset signal (IRST). IRST causes all registers to be returned to their default values and all
modules to be returned to their reset states.
An internal reset clears the SIM counter (see
the resets sets a corresponding bit in the SIM reset status register (SRSR). See
14.3.1 External Pin Reset
The RST pin circuit includes an internal pullup device. Pulling the asynchronous RST pin low halts all
processing. The PIN bit of the SIM reset status register (SRSR) is set as long as RST is held low for a
minimum of 67 CGMXCLK cycles, assuming that neither the POR nor the LVI was the source of the reset.
See
14.3.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 CGMXCLK cycles to allow resetting of
external peripherals. The internal reset continues to be asserted for an additional 32 cycles at which point
the reset vector will be fetched. See
illegal opcode, COP timeout, LVI, or POR. See
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals and other chips within a system
built around the MCU.
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Table 14-2
Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit module (LVI)
Illegal opcode
Illegal address
Forced monitor mode entry reset (MODRST)
CGMOUT
RST
IAB
For LVI or POR resets, the SIM cycles through 4096 + 32 CGMXCLK
cycles during which the SIM forces the RST pin low. The internal reset
signal then follows the sequence from the falling edge of RST shown in
Figure
for details.
PC
14-5.
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Figure 14-4
Figure 14-4. External Reset Timing
Figure
shows the relative timing.
14-5. An internal reset can be caused by an illegal address,
14.4 SIM
Figure
NOTE
14-6.
Counter), but an external reset does not. Each of
VECT H
VECT L
14.7 SIM Registers.
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