MC68HC711D3CFNE2 Freescale Semiconductor, MC68HC711D3CFNE2 Datasheet - Page 63
![IC MCU 8BIT 3MHZ 44-PLCC](/photos/6/89/68924/375-44-plcc_sml.jpg)
MC68HC711D3CFNE2
Manufacturer Part Number
MC68HC711D3CFNE2
Description
IC MCU 8BIT 3MHZ 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Specifications of MC68HC711D3CFNE2
Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
26
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC711D3CFNE2
Manufacturer:
ALLEGEO
Quantity:
4 492
Company:
Part Number:
MC68HC711D3CFNE2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.4 Port C
Port C is an 8-bit, general-purpose I/O port with a data register (PORTC) and a data direction register
(DDRC). In the single-chip mode, port C pins are general-purpose I/O pins (PC7–PC0). In the
expanded-multiplexed mode, port C pins are configured as multiplexed address/data pins. During the
address cycle, bits 7–0 of the address are output on PC7–PC0. During the data cycle, bits 7–0
(PC7–PC0) are bidirectional data pins controlled by the R/W signal.
5.4.1 Port C Control Register
CWOM — Port C Wire-OR Mode Bit
5.4.2 Port C Data Register
PORTC can be read at any time. Inputs return the sensed levels at the pin, while outputs return the input
level of the port C pin drivers. If PORTC is written, the data is stored in an internal latch and can be driven
only if port C is configured for general-purpose outputs in single-chip or bootstrap mode.
Port C pins are general-purpose inputs out of reset in single-chip and bootstrap modes. These pins are
multiplexed low-order address and data bus lines out of reset in expanded-multiplexed and test modes.
5.4.3 Port C Data Direction Register
DDC7–DDC0 — Data Direction Bits for Port C
Freescale Semiconductor
1 = Port C outputs are open drain (to facilitate testing)
0 = Port C operates normally
1 = Corresponding port C pin is configured as output
0 = Corresponding port C pin is configured for input only
Address:
Address:
Address:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
$0002
$0003
$0007
DDC7
Bit 7
Bit 7
PC7
Bit 7
Figure 5-6. Data Direction Register for Port C (DDRC)
0
0
0
0
Figure 5-4. Port C Control Register (PIOC)
Figure 5-5. Port C Data Register (PORTC)
DDC6
PC6
6
0
0
6
0
6
0
MC68HC711D3 Data Sheet, Rev. 2.1
CWOM
DDC5
PC5
5
0
5
0
5
0
DDC4
PC4
4
0
0
4
0
4
0
DDC3
PC3
3
0
0
3
0
3
0
DDC2
PC2
2
0
0
2
0
2
0
DDC1
PC1
1
0
0
1
0
1
0
DDC0
Bit 0
Bit 0
PC0
Bit 0
0
0
0
0
Port C
63