M30263F6AFP#U7 Renesas Electronics America, M30263F6AFP#U7 Datasheet - Page 258
![IC M16C/26A MCU FLASH 42SSOP](/photos/28/61/286144/42-ssop_sml.jpg)
M30263F6AFP#U7
Manufacturer Part Number
M30263F6AFP#U7
Description
IC M16C/26A MCU FLASH 42SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30263F6AFP#U7
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
33
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R
R
M
17.5 Register Description
e
E
1
. v
J
6
0
C
Figure 17.5.1 shows the flash memory control register 0 and flash memory control register 1. Figure 17.5.2
shows the flash memory control register 4.
17.5.1 Flash memory control register 0 (FMR0)
2
9
0 .
B
2 /
•FMR 00 Bit
•FMR01 Bit
•FMR02 Bit
•FMSTP Bit
•FMR06 Bit
•FMR07 Bit
Figure 17.5.1.1 shows a EW0 mode set/reset flowchart, figure 17.5.1.2 shows a EW1 mode set/reset
flowchart.
0
0
6
2
A
0
This bit indicates the operation status of the flash memory. The bit is “0” during programming, erasing,
or erase-suspend mode; otherwise, the bit is “1”.
The microcomputer enables to acknowledge commands by setting the FMR01 bit to “1” (CPU rewrite
mode). To set this bit to “1”, it is necessary to set to “1” after first setting to “0”. Set this bit to “0” by only
writing “0”.
The combined setting of the FMR02 bit and the FMR16 bit enable to program and erase in the user
ROM area. See Table 17.5.2.1 for setting details. To set this bit to “1”, it is necessary to set to “1” after
first setting to “0”. Set this bit to “0” by only writing “0”. This bit is enabled only when the FMR01 bit is
“1” (CPU rewrite mode enable).
This bit resets the flash memory control circuits and minimizes power consumption in the flash
memory. Access to the flash memory is disabled when the FMSTP bit is set to “1”. Set the FMSTP bit
by a program in a space other than the flash memory.
Set the FMSTP bit to “1” if one of the following occurs:
Figure 17.5.1.3 shows a flow chart illustrating how to start and stop the flash memory before and after
entering low power mode. Follow the procedure on this flow chart.
To enter stop or wait mode when CPU rewrite mode is disabled, do not set the FMR0 register. The
flash memory is automatically turned off when entering and turned back on when exiting.
This is a read-only bit indicating an auto-program operation status. This bit is set to “1” when a pro-
gram error occurs; otherwise, it is set to “0”. For details, refer to 17.8.4 Full Status Check.
This is a read-only bit indicating an auto-erase operation status. The bit is set to “1” when an erase
error occurs; otherwise, it is set to “0”. For details, refer to 17.8.4 Full Status Check.
F
2
e
G
•A flash memory access error occurs during erasing or programming in EW0 mode (FMR00 bit does
•Low-power consumption mode or on-chip oscillator low-power consumption mode is entered.
0 -
b
not switch back to “1” (ready)).
o r
1 .
2
0
, 5
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0
p
2
(
0
M
0
7
1
6
C
page 239
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17. Flash Memory Version
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