M30855FJGP#D3 Renesas Electronics America, M30855FJGP#D3 Datasheet - Page 103

• Manufacturer Part Number: M30855FJGP#D3
• Description: MCU 3/5V 512K I-TEMP 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30855FJGP#D3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

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Figure 8.12 Bus Priority Order
Table 8.7 Microcomputer Status in Hold State
Table 8.8 External Bus States when Accessing Internal Space
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8.2.7 HOLD Signal
8.2.8 External Bus Status when Accessing Internal Space
8.2.9 BCLK Output
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The HOLD signal transfers bus privileges from the CPU to external circuits. When a low-level ("L") signal is
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__________
HOLD pin is held "L", the microcomputer is in a hold state and the HLDA pin outputs an "L" signal.
Table 8.7 shows the microcomputer status in a hold state.
Bus is used in the following priority order: HOLD, DMAC, CPU.
D
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Table 8.8 shows external bus states when an internal space is accessed.
d
The CPU clock operates the CPU. P5
PM0 register is set to "0" (BCLK) and the CM01 and CM00 bits in the CM0 register are set to "00
port P5
No BCLK is output in single-chip mode. Refer to 9. Clock Generation Circuit for details.
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