MC908GR16ACFAER Freescale Semiconductor, MC908GR16ACFAER Datasheet - Page 250
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC908GR16ACFAER
Manufacturer Part Number
MC908GR16ACFAER
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR16ACFAE.pdf
(270 pages)
Specifications of MC908GR16ACFAER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR16ACFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Electrical Specifications
250
Capacitance
Monitor mode entry voltage
Low-voltage inhibit, trip falling voltage
Low-voltage inhibit, trip rising voltage
Low-voltage inhibit reset/recover hysteresis
POR rearm voltage
POR reset voltage
POR rise time ramp rate
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25°C only.
3. Run (operating) I
4. Wait I
5. Stop I
6. Stop I
7. Pullups and pulldowns are disabled. Port B leakage is specified in
8. Maximum is highest voltage that POR is guaranteed.
9. Maximum is highest voltage that POR is possible.
10. If minimum V
Ports (as input or output)
(V
loads. Less than 100 pF on all outputs. C
affects run I
than 100 pF on all outputs. C
I
configured as inputs. Typical values at midpoint of voltage range, 25°C only.
from rail. No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
V
DD
TRIPF
DD
DD
. Measured with CGM and LVI enabled.
= 5.0 Vdc ± 10%, V
is reached.
DD
DD
DD
+ V
measured using external square wave clock source (f
is measured with OSC1 = V
with TBM enabled is measured using an external square wave clock source (f
HYS
DD
DD
. Measured with all modules enabled.
= V
(9)
(8)
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
Characteristic
TRIPR
measured using external square wave clock source (f
(10)
)
SS
= 0 Vdc, T
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait
(1)
SS
A
MC68HC908GR16A Data Sheet, Rev. 1.0
= T
. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on all outputs. All ports
L
A
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
(min) to T
A
(max), unless otherwise noted
V
Symbol
V
V
PORRST
R
V
V
V
C
OSC
TRIPR
TRIPF
C
POR
POR
HYS
TST
Out
In
= 32 MHz). All inputs 0.2 V from rail. No dc loads. Less
20.10 5.0-Volt ADC
OSC
V
DD
0.035
3.90
4.20
Min
—
—
—
0
0
= 32 MHz). All inputs 0.2 V from rail. No dc
+ 2.5
Characteristics.
OSC
Typ
4.25
4.35
100
700
—
—
—
—
—
= 32 MHz). All inputs 0.2 V
(2)
Freescale Semiconductor
V
DD
Max
4.50
4.60
100
800
12
—
—
8
+ 4.0
V/ms
Unit
mV
mV
mV
pF
V
V
V
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