MC9S08RE16FDE Freescale Semiconductor, MC9S08RE16FDE Datasheet - Page 150
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MC9S08RE16FDE
Manufacturer Part Number
MC9S08RE16FDE
Description
IC MCU 16K FLASH 1K RAM 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08RE16FDE
Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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Serial Communications Interface (S08SCIV1)
12.2
The SCI has eight 8-bit registers to control baud rate, select SCI options, report SCI status, and for
transmit/receive data.
Refer to the direct-page register summary in the
assignments for all SCI registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
12.2.1
This pair of registers controls the prescale divisor for SCI baud rate generation. To update the 13-bit baud
rate setting [SBR12:SBR0], first write to SCI1BDH to buffer the high half of the new value and then write
to SCI1BDL. The working value in SCI1BDH does not change until SCI1BDL is written.
SCI1BDL is reset to a non-zero value, so after reset the baud rate generator remains disabled until the first
time the receiver or transmitter is enabled (RE or TE bits in SCI1C2 are written to 1).
150
SBR[12:8]
SBR[7:0]
Reset
Reset
Field
Field
4:0
7:0
W
W
R
R
Register Definition
SBR7
SCI Baud Rate Registers (SCI1BDH, SCI1BHL)
Baud Rate Modulo Divisor — These 13 bits are referred to collectively as BR, and they set the modulo divide
rate for the SCI baud rate generator. When BR = 0, the SCI baud rate generator is disabled to reduce supply
current. When BR = 1 to 8191, the SCI baud rate = BUSCLK/(16×BR). See also BR bits in
Baud Rate Modulo Divisor — These 13 bits are referred to collectively as BR, and they set the modulo divide
rate for the SCI baud rate generator. When BR = 0, the SCI baud rate generator is disabled to reduce supply
current. When BR = 1 to 8191, the SCI baud rate = BUSCLK/(16×BR). See also BR bits in
0
0
0
7
7
= Unimplemented or Reserved
SBR6
0
0
0
6
6
Table 12-1. SCI1BDH Register Field Descriptions
Table 12-2. SCI1BDL Register Field Descriptions
Figure 12-3. SCI Baud Rate Register (SCI1BDH)
Figure 12-4. SCI Baud Rate Register (SCI1BDL)
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
SBR5
0
0
0
5
5
Memory
SBR12
SBR4
0
0
4
4
Description
Description
chapter of this data sheet for the absolute address
SBR11
SBR3
3
0
3
0
SBR10
SBR2
0
1
2
2
Freescale Semiconductor
SBR9
SBR1
0
0
1
1
Table
Table
12-2.
12-1.
SBR8
SBR0
0
0
0
0
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