DS87C550-QNL Maxim Integrated Products, DS87C550-QNL Datasheet - Page 17

• Manufacturer Part Number: DS87C550-QNL
• Description: IC MCU EPROM ADC/PWM HS 68-PLCC
• Manufacturer: Maxim Integrated Products
• Series: 87Cr

Specifications of DS87C550-QNL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, PWM, WDT
• Number Of I /o: 55
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-LCC, 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

oscillator-fail detect circuit, the processor will be forced to a known state (i.e., reset) even if the oscillator
stops.
The oscillator-fail detect circuitry is enabled by software setting the enable bit OFDE (PCON.4) to a 1.
There is an oscillator-fail detect flag, OFDF (PCON.5), that is set to a 1 by the hardware when it detects
an oscillator failure. The processor will be forced into a reset state when this occurs if enabled by OFDE.
The oscillator-fail detect flag can only be cleared to a 0 by a power-up reset or by software. It should be
noted that the oscillator-fail detect circuitry is not disabled by entering Stop mode. Therefore, the user
must ensure that this feature is disabled before entering Stop mode.
POWER MANAGEMENT MODE (PMM)
Power Management Mode offers a complete scheme of reduced internal clock speeds that allow the CPU
to run software but to use substantially less power. Normally, during default operation, the DS87C550
uses 4 clocks per machine cycle. Thus the instruction cycle (machine cycle clock) rate is clock/4. At
33MHz crystal speed, the instruction cycle speed is 8.25MHz. In PMM the microcontroller operates, but
from an internally divided version of the clock source. This creates a lower power state without external
components. As shown in Figure 3, the system clock may be selected to use the crystal (or external
oscillator) frequency divided by 256. This produces a machine cycle that consists of the crystal frequency
divided by 1024, which is considered Power Management Mode (PMM). With the processor executing
instructions at this much lower rate, a significant amount of power is saved.
Software is the only mechanism to invoke the PMM. Table 6 illustrates the instruction cycle rate in PMM
for several common crystal frequencies. Since power consumption is a direct function of operating speed,
PMM runs very slowly and provides the lowest power consumption without stopping the CPU. This is
illustrated in Table 7.
MACHINE CYCLE RATE Table 6
OPERATING CURRENT ESTIMATES IN PMM Table 7
Note that PMM provides a lower power condition than Idle mode. This is because in Idle, all clocked
functions such as timers run at a rate of crystal divided by 4. Since wakeup from PMM is as fast as or
faster than wakeup from Idle, and since PMM allows the CPU to continue to execute instructions (even if
doing NOPs), there is little reason to use Idle in new designs.
Crystal Speed
11.0592MHz
16MHz
25MHz
33MHz
SPEED (MHz)
CRYSTAL
11.0592
16
25
33
Full Operation
(4 clocks per machine cycle)
2.765MHz
4.0MHz
6.25MHz
8.25MHz
FULL OPERATION (mA)
MACHINE CYCLE)
(4 CLOCKS PER
13.1
17.2
25.7
32.8
17 of 49
10.8 kHz
24.4 kHz
32.2 kHz
PMM
(1024 clocks per machine cycle)
15.6 kHz
(1024 CLOCKS PER
MACHINE CYCLE)
PMM (mA)
4.8
5.6
7.0
8.2