LMH6504MM/NOPB National Semiconductor, LMH6504MM/NOPB Datasheet - Page 4

IC AMP VAR GAIN LOW POWER 8MSOP

LMH6504MM/NOPB

Manufacturer Part Number
LMH6504MM/NOPB
Description
IC AMP VAR GAIN LOW POWER 8MSOP
Manufacturer
National Semiconductor
Series
LMH®r
Type
Variable Gain Amplifierr
Datasheet

Specifications of LMH6504MM/NOPB

Amplifier Type
Variable Gain
Number Of Circuits
1
Slew Rate
1500 V/µs
-3db Bandwidth
150MHz
Current - Input Bias
1.4µA
Current - Supply
11mA
Current - Output / Channel
80mA
Voltage - Supply, Single/dual (±)
7 V ~ 12 V, ±3.5 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Number Of Channels
1
Number Of Elements
1
Power Supply Requirement
Dual
Input Resistance
7MOhm
Input Bias Current
3.5uA
Single Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (typ)
±5V
Power Supply Rejection Ratio
65dB
Rail/rail I/o Type
No
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
±3.5V
Dual Supply Voltage (max)
±6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
MSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Gain Bandwidth Product
-
Voltage - Input Offset
-
Lead Free Status / Rohs Status
Compliant
Other names
LMH6504MM
LMH6504MMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMH6504MM/NOPB
Manufacturer:
TI
Quantity:
718
Part Number:
LMH6504MM/NOPB
Manufacturer:
TI
Quantity:
282
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Electrical Characteristics
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that T
Note 3: The maximum output current (I
Note 4: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 5: Slew rate is the average of the rising and falling slew rates.
Note 6: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 7: Positive current corresponds to current flowing into the device.
Note 8: Drift determined by dividing the change in parameter distribution at temperature extremes by the total temperature change.
Note 9: +PSRR definition: [|∆V
subtracted out.
Note 10: Gain/Phase normalized to low frequency value at 25˚C.
Note 11: Gain/Phase normalized to low frequency value at each setting.
Note 12: Gain control frequency response schematic:
Note 13: Flat Band Attenuation (Relative To Max Gain) Range Definition: Specified as the attenuation range from maximum which allows gain flatness specified
(either
Note 14: Input bias current drift with temperature can be either positive or negative for a given sample.
Note 15: The maximum power dissipation is a function of T
P
Connection Diagram
Ordering Information
±
±
8-Pin MSOP
0.2 dB: 19.7 dB down to -6.3 dB = 26 dB range
0.1 dB: 19.7 dB down to 10.2 dB = 9.5 dB range
D
8-Pin SOIC
Package
= (T
±
J(MAX)
0.2dB or
– T
±
A
)/ θ
0.1dB), relative to A
J
JA
= T
. All numbers apply for packages soldered directly onto a PC Board.
A
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T
LMH6504MMX
LMH6504MAX
Part Number
LMH6504MM
LMH6504MA
OUT
/∆V
+
| / A
VMAX
OUT
V
) is determined by device power dissipation limitations or value specified, whichever is lower.
], −PSRR definition: [|∆V
gain. For example, for f
(Note 2) (Continued)
Package Marking
LMH6504MA
J(MAX)
A93A
OUT
<
30 MHz, here are the Flat Band Attenuation ranges:
, θ
/∆V
8-Pin SOIC
Top View
JA
| / A
. The maximum allowable power dissipation at any ambient temperature is
4
V
] with 0.1V input voltage. ∆V
20084301
2.5k Units Tape and Reel
3.5k Units Tape and Reel
1k Units Tape and Reel
Transport Media
20084316
95 Units/Rail
OUT
is the change in output voltage with offset shift
NSC Drawing
MUA08A
M08A
J
>
T
A
.

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