LMP8601MA/NOPB National Semiconductor, LMP8601MA/NOPB Datasheet - Page 15

• Manufacturer Part Number: LMP8601MA/NOPB
• Description: IC AMP CURRENT SENSE 60V 8SOIC
• Manufacturer: National Semiconductor
• Series: LMP®r

Specifications of LMP8601MA/NOPB

• Amplifier Type: Current Sense
• Number Of Circuits: 1
• Slew Rate: 0.83 V/µs
• Gain Bandwidth Product: 60kHz
• Current - Input Bias: 0.04pA
• Voltage - Input Offset: 150µV
• Current - Supply: 1.1mA
• Current - Output / Channel: 48mA
• Voltage - Supply, Single/dual (±): 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• No. Of Amplifiers: 1
• Input Bias Current: 20nA
• Input Offset Voltage: 1mV
• Bandwidth: 60kHz
• Cmrr: 90dB
• Supply Voltage Range: 3V To 5.5V
• Supply Current: 1.1mA
• Rohs Compliant: Yes
• Number Of Channels: 1
• Common Mode Rejection Ratio (min): 80 dB
• Available Set Gain: 26.06 dB
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• For Use With: LMP8601MAEVAL - BOARD EVALUATION FOR LMP8601MA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Details
• Other names: *LM8601MA/NOPB; LMP8601MA

From this equation, for a desired value of the gain, the re-
quired value of R
BIDIRECTIONAL CURRENT SENSING
The signal on the A1 and OUT pins is ground-referenced
when the OFFSET pin is connected to ground. This means
that the output signal can only represent positive values of the
current through the shunt resistor, so only currents flowing in
one direction can be measured. When the offset pin is tied to
the positive supply rail, the signal on the A1 and OUT pins is
referenced to a mid-rail voltage which allows bidirectional
current sensing. When the offset pin is connected to a voltage
source, the output signal will be level shifted to that voltage
divided by two. In principle, the output signal can be shifted
to any voltage between 0 and V
voltage to the OFFSET pin.
With the offset pin connected to the supply pin (V
ation of the amplifier will be fully bidirectional and symmetrical
around 0V differential at the input pins. The signal at the out-
put will follow this voltage difference multiplied by the gain and
at an offset voltage at the output of half V
Example:
With 5V supply and a gain of 20x, a differential input signal of
+10mV will result in 2.7V at the output pin. similarly -10mV at
the input will result in 2.3V at the output pin.
Note: The OFFSET pin has to be driven from a very low-impedance source
POWER SUPPLY DECOUPLING
In order to decouple the LMP8601/LMP8601Q from AC noise
on the power supply, it is recommended to use a 0.1 µF by-
pass capacitor between the V
should be placed as close as possible to the supply pins. In
(<10Ω). This is because the OFFSET pin internally connects directly
to the resistive feedback networks of the two gain stages. When the
OFFSET pin is driven from a relatively large impedance (e.g. a re-
sistive divider between the supply rails) accuracy will decrease.
i
can be calculated with:
S
and GND pins. This capacitor
S
/2 by applying twice that
S
.
S
) the oper-
FIGURE 4. Increase Gain
K2 = 2
15
It should be noted from the equation for the gain G
large gains R
nator in the equation becomes close to zero. In practice, for
large gains the denominator will be determined by tolerances
in the value of the external resistor R
kΩ resistor. In this case, the gain becomes very inaccurate. If
the denominator becomes equal to zero, the system will even
become instable. It is recommended to limit the application of
this technique to gain values of 50 or smaller.
some cases an additional 10 µF bypass capacitor may further
reduce the supply noise.
DRIVING SWITCHED CAPACITIVE LOADS
Some ADCs load their signal source with a sample and hold
capacitor. The capacitor may be discharged prior to being
connected to the signal source. If the LMP8601/LMP8601Q
is driving such ADCs the sudden current that should be de-
livered when the sampling occurs may disturb the output
signal. This effect was simulated with the circuit shown in
Figure 5
rail to rail square wave.
This circuit simulates the switched connection of a discharged
capacitor to the LMP8601/LMP8601Q output. The resulting
V
and
OUT
Figure
FIGURE 5. Driving Switched Capacitive Load
disturbance
where the output is to a capacitor that is driven by a
7.
i
approaches 100 kΩ. In this case, the denomi-
signals
20157157
are
shown
i
and the internal 100
in
www.national.com
Figure
i
that for
20157160
6