MP108FDA Cirrus Logic Inc, MP108FDA Datasheet - Page 4

• Manufacturer Part Number: MP108FDA
• Description: IC OPAMP 200V 10A 100W A 34DIP
• Manufacturer: Cirrus Logic Inc
• Series: Apex Precision Power™r

Specifications of MP108FDA

• Amplifier Type: Power
• Number Of Circuits: 1
• Slew Rate: 170 V/µs
• Gain Bandwidth Product: 10MHz
• Current - Input Bias: 70pA
• Voltage - Input Offset: 1000µV
• Current - Supply: 50mA
• Current - Output / Channel: 11A
• Voltage - Supply, Single/dual (±): 30 V ~ 200 V, ±15 V ~ 100 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 34-DIP Module
• Number Of Channels: 1
• Voltage Gain Db: 96 dB
• Common Mode Rejection Ratio (min): 92 dB
• Input Offset Voltage: 3 mV
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Maximum Dual Supply Voltage: +/- 100 V
• Minimum Operating Temperature: - 40 C
• For Use With: 598-1470 - KIT EVAL FOR MP108FD/MP111FD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1408; MP108FDA

MP108 • MP108A
GENERAL
erations" which covers stability, power supplies, heat sinking,
mounting, current limit, SOA interpretation, and specification
interpretation. Visit www.cirrus.com for design tools that help
automate tasks such as calculations for stability, internal power
dissipation, current limit, heat sink selection, Apex Precision
Power's complete Application Notes library, Technical Seminar
Workbook and Evaluation Kits.
GROUND PINS
provide a return for the internal capacitive bypassing of the
small signal portions of the MP108. The two ground pins are
not connected together on the substrate. Both of these pins
are required to be connected to the system signal ground.
SAFE OPERATING AREA
second breakdown considerations as in bipolar output stages.
Only thermal considerations and current handling capabilities
limit the SOA (see Safe Operating Area graph on previous page).
The output stage is protected against transient flyback by the
parasitic body diodes of the output stage MOSFET structure.
However, for protection against sustained high energy flyback
external fast-recovery diodes must be used.
COMPENSATION
between pins 5 and 6. Unity gain stability can be achieved with
any capacitor value larger than 100pF for a minimum phase
margin of 45 degrees. At higher gains more phase shift can
usually be tolerated in most designs and the compensation
capacitor value can be reduced resulting in higher bandwidth
and slew rate. Use the typical operating curves as a guide to
select C
required rated for the full supply voltage (200V).
OVERVOLTAGE PROTECTION
up to ±25V, additional external protection is recommended. In
most applications 1N4148 signal diodes connected anti-parallel
across the input pins is sufficient. In more demanding applica-
tions where bias current is important diode connected JFETs
such as 2N4416 will be required. See Q1 and Q2 in Figure 1.
In either case the differential input voltage will be clamped to
±0.7V. This is usually sufficient overdrive to produce the maxi-
mum power bandwidth. Some applications will also need over
voltage protection devices connected to the power supply rails.
Unidirectional zener diode transient suppressors are recom-
mended. The zeners clamp transients to voltages within the
power supply rating and also clamp power supply reversals to
ground. Whether the zeners are used or not the system power
supply should be evaluated for transient performance including
power-on overshoot and power-off polarity reversals as well as
line regulation. See Z1 and Z2 in Figure 1.
POWER SUPPLY BYPASSING
must be connected physically close to the pins to prevent local
4
Please read Application Note 1 "General Operating Consid-
The MP108 has two ground pins (pins 3, 32). These pins
The MOSFET output stage of the MP108 is not limited by
The external compensation capacitor C
Although the MP108 can withstand differential input voltages
Bypass capacitors to power supply terminals +V
C
for the application. An NPO (COG) type capacitor is
C
is connected
S
and -V
P r o d u c t I n n o v a t i o n F r o m
S
parasitic oscillation in the output stage of the MP108. Use
electrolytic capacitors at least 10µF per output amp required.
Bypass the electrolytic capacitors with high quality ceramic
capacitors (X7R) 0.1µF or greater. In most applications power
supply terminals +V
-V
internally but both ground pins 3 and 32 must be connected to
the system signal ground to be effective. In all cases power to
the buffer amplifier stage of the MP108 at pins 8 and 25 must
be connected to +V
Provide local bypass capacitors at pins 8 and 25. See the
external connections diagram on page 1.
FIGURE 1
OVERVOLTAGE PROTECTION
CURRENT LIMIT
across the current limit sense resistor. For the current limit to
work correctly pin 28 must be connected to the amplifier output
side and pin 27 connected to the load side of the current limit
resistor R
any parasitic resistances RP, formed by socket and solder joints
as well as internal amplifier losses. The current limiting resistor
may not be placed anywhere in the output circuit except where
shown in Figure 2. The value of the current limit resistor can
be calculated as follows: R
BOOST OPERATION
are operated at a higher supply voltages than the amplifierís
high current output stage. +V
are connected to the small signal stages and +V
and -V
stage. An additional 10V on the +V
to allow the small signal stages to drive the output stage into
the triode region and improve the output voltage swing for extra
efficient operation when required. When the boost feature is
not needed +V
pins respectively. The +V
at supply voltages less than +V
BACKPLATE GROUNDING
It is required that it be connected to signal ground. Connect pin
2 (back plate) to signal ground. The back plate will then be AC
grounded to signal ground through a 1µF capacitor.
+IN
-IN
Q1
S
The two current limit sense lines are to be connected directly
With the boost feature the small signal stages of the amplifier
The substrate of the MP108 is an insulated metal substrate.
respectively. Supply voltages +V
Q2
S
33
34
(pins 17-19) are connected to the high current output
+Vs
-Vs
LIM
+Vs
-Vs
-Vb
+Vb
as shown in Figure 2. This connection will bypass
Z1
Z2
GND
GND
S
3
32
and -V
B
B
and -V
and -V
S
B
OUT
are connected to the +V
and -V
LIM
B
B
B
IN
= .65/I
(pins 4,8) and -V
at pins 4 and 30 respectively.
will be connected to +V
R
S
IN
and -V
B
34
B
pins must not be operated
33
FIGURE 2
4 WIRE CURRENT LIMIT
LIMIT
and -V
B
and -V
S
respectively.
I
LIM-
R
B
27
F
I
LIM+
pins is sufficient
B
28
are bypassed
OUT
11-13
20-22
B
S
(pins 25,30)
(pins 14-16)
R
P
B
MP108U
and -V
R
LIM
S
and
R
L
B