MAX4206ETE+ Maxim Integrated Products, MAX4206ETE+ Datasheet - Page 10
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MAX4206ETE+
Manufacturer Part Number
MAX4206ETE+
Description
IC AMP TRANS LOG 16-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX4206ETET.pdf
(17 pages)
Specifications of MAX4206ETE+
Amplifier Type
Logarithmic
Number Of Circuits
1
Slew Rate
12 V/µs
Gain Bandwidth Product
5MHz
Voltage - Input Offset
1000µV
Current - Supply
5mA
Current - Output / Channel
58mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 11 V, ±2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Number Of Channels
1
Input Offset Voltage
5 mV
Operating Supply Voltage
3 V, 5 V, 9 V
Supply Current
5 mA
Operating Temperature Range
+ 85 C
Mounting Style
SMD/SMT
Power Dissipation
1349 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
-3db Bandwidth
-
Current - Input Bias
-
Lead Free Status / Rohs Status
Details
Precision Transimpedance Logarithmic
Amplifier with Over 5 Decades of Dynamic Range
Figure 1. Functional Diagram
Figure 2 shows a simplified model of a logarithmic
amplifier. Two transistors convert the currents applied
at LOGIIN and REFIIN to logarithmic voltages accord-
ing to the following equation:
where:
The logarithmic amplifier compares V
ence voltage V
known reference current, I
10
V
k = 1.381 x 10
T = absolute temperature (K)
q = 1.602 x 10
I
I
C
S
BE
______________________________________________________________________________________
= reverse saturation current
= collector current
= base-emitter voltage of a bipolar transistor
LOGIIN
CMVIN
REFIIN
GND
V
EE
BE2
-23
V
–19
, which is a logarithmic voltage for a
BE
J/K
C
=
Detailed Description
kT
q
REF
V
V
V
CC
CC
EE
. The temperature depen-
ln
I
I
C
S
BE1
MAX4206
to the refer-
Theory
CORRECTION
CURRENT
V
CC
COMPENSATION
TEMPERATURE
SUMMING
AMPLIFIER
REFVOUT
1.238V
dencies of a logarithmic amplifier relate to the thermal
voltage, (kT/q), and I
the I
following manner:
AND
S
temperature dependence of the amplifier in the
CMVOUT
0.5V
V
=
=
=
=
= ×
OUT
K
kT
kT
kT
kT
q
q
q
q
log
=
ln
(
ln( )
V
ln
ln
10
BE
I
10
LOG
V
1
I
CURRENT MIRROR
I
I
S
I
LOG
LOG
CC
REF
I
I
−
LOG
S
I
)
REF
S
. Matched transistors eliminate
V
−
BE
log
V
V
−
CC
EE
2
10
kT
ln
q
I
I
I
LOG
REF
REF
ln
I
S
I
REF
I
S
REFIOUT
REFISET
LOGV2
SCALE
OSADJ
LOGV1
(
see Figure
3
)