EL5420CR-T7 Intersil, EL5420CR-T7 Datasheet
EL5420CR-T7
Specifications of EL5420CR-T7
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EL5420CR-T7 Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2005, 2007, 2008, 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. FN7186.6 ...
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... EL5420CS-T13 5420CS EL5420CSZ (Note) 5420CSZ EL5420CSZ-T7* (Note) 5420CSZ EL5420CSZ-T13* (Note) 5420CSZ EL5420CR 5420CR EL5420CR-T7* 5420CR EL5420CR-T13* 5420CR EL5420CRZ (Note) 5420CRZ EL5420CRZ-T7* (Note) 5420CRZ EL5420CRZ-T13* (Note) 5420CRZ * Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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Pinouts EL5220 (8 LD MSOP) TOP VIEW VOUTA 1 VINA VINA+ 3 VS- 4 EL5120 (5 LD TSOT) TOP VIEW VOUT 1 5 VS+ VS VIN VIN- 3 EL5120, EL5220, EL5420 8 ...
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... Ld TSOT (Note DFN (Note MSOP (Note 1 QFN (Note SOIC (Note TSSOP (Note Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = -5V 10kΩ and C = 10pF to 0V ...
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Electrical Specifications +5V PARAMETER DESCRIPTION PM Phase Margin CS Channel Separation NOTES: 3. Measured over operating temperature range. 4. Slew rate is measured on rising and falling edges. Electrical Specifications +5V, V ...
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Electrical Specifications +15V PARAMETER DESCRIPTION INPUT CHARACTERISTICS V Input Offset Voltage OS TCV Average Offset Voltage Drift OS I Input Bias Current B R Input Impedance IN C Input Capacitance IN CMIR Common-Mode Input Range ...
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Typical Performance Curves 1800 V = ±5V S 1600 T = +25°C A 1400 1200 1000 800 600 400 200 0 INPUT OFFSET VOLTAGE (mV) FIGURE 1. EL5420 INPUT OFFSET VOLTAGE DISTRIBUTION ± ...
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Typical Performance Curves 100 TEMPERATURE (°C) FIGURE 7. OPEN LOOP GAIN vs TEMPERATURE V = ±5V S 0.55 0.5 0.45 - TEMPERATURE (°C) FIGURE 9. EL5420 SUPPLY CURRENT PER AMPLIFIER vs TEMPERATURE 200 ...
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Typical Performance Curves 10kΩ ± -10 1000pF -20 -30 100k 1M FREQUENCY (Hz) FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS ±5V ...
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Typical Performance Curves 0.010 0.009 0.008 0.007 0.006 0.005 0.004 V = ± 10kΩ 0.003 0.002 RMS 0.001 1k 10k FREQUENCY (Hz) FIGURE 19. TOTAL HARMONIC DISTORTION + ...
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Pin Descriptions EL5120 EL5220 EL5420 MSOP TSSOP, TSOT 8 LD DFN 14 LD SOIC ...
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Applications Information Product Description The EL5120, EL5220, and EL5420 voltage feedback amplifiers are fabricated using a high voltage CMOS process. They exhibit rail-to-rail input and output capability, they are unity gain stable, and have low power consumption (500µA per amplifier). ...
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IC due to the loads as shown in Equation 2: Σi × [ × – V DMAX S SMAX S OUT when sourcing, and: Σi ...
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... The pin #1 identifier may be either a mold or mark feature Dimensions D2 and E2 are for the exposed pads which provide 0. improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389 TERMINAL TIP e MILLIMETERS MIN NOMINAL MAX A ...
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Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...
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Mini SO Package Family (MSOP) 0. SEATING PLANE b 0. LEADS L1 c SEE DETAIL "X" DETAIL X 16 EL5120, EL5220, EL5420 MDP0043 ...
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Thin Shrink Small Outline Package Family (TSSOP (N/2)+ (N/2) B TOP VIEW e C SEATING PLANE b 0.10 0. LEADS SIDE VIEW SEE DETAIL ‚Äö c END VIEW ...
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QFN (Quad Flat No-Lead) Package Family PIN #1 3 I.D. MARK 2X 0.075 C TOP VIEW 0. (E2) 7 (D2) BOTTOM VIEW 0. SEATING PLANE 0.08 C ...
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TSOT Package Family 0. (N/ 0. SEATING PLANE 0. (L1 EL5120, ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...