DS1236S-5N Maxim Integrated Products, DS1236S-5N Datasheet - Page 5
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DS1236S-5N
Manufacturer Part Number
DS1236S-5N
Description
IC MICROMANAGER 5% IND 16-SOIC
Manufacturer
Maxim Integrated Products
Series
MicroManagerr
Type
Battery Backup Circuitr
Datasheet
1.DS1236S-10.pdf
(19 pages)
Specifications of DS1236S-5N
Number Of Voltages Monitored
1
Output
Open Drain, Push-Pull
Reset
Active High/Active Low
Reset Timeout
25 ms Minimum
Voltage - Threshold
4.62V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DS1236 FUNCTIONAL BLOCK DIAGRAM Figure 1
If the IN pin is connected to V
mode (RC=0). In the CMOS mode (RC=V
produce a pulse on the
to V
V
determined by the RC pin (see “Reset Control” section).
MEMORY BACKUP
The DS1236 provides all of the necessary functions required to battery back a static RAM. First, a switch
is provided to direct SRAM power from the incoming 5-volt supply (V
(V
microprocessor. For more information about nonvolatile processor applications, review the “Reset
Control” and “Wake Control” sections. Second, the same power-fail detection described in the power
monitor section is used to hold the chip enable output (
volts of V
BAT
BAT
CCTP
. Once V
), whichever is greater. This switched supply (V
, the
BAT
. This write protection mechanism occurs as V
NMI
CC
decays to V
pin will remain high. The
NMI
pin. Given that any
BAT
CCO
, the
, the
NMI
NMI
CCO
output will pulse low as V
pin will either remain at V
) the power-down of V
NMI
5 of 19
NMI
voltage will follow V
pulse has been completed by the time V
CCO
CEO
) can also be used to battery back a CMOS
) to within 0.3 volts of V
CC
falls below V
CC
CC
out-of-tolerance at V
CC
OHL
decays to V
CC
) or from an external battery
CCTP
down until V
or enter tri-state mode as
as specified. If
CC
CCTP
or to within 0.7
in the NMOS
CC
CCTP
CC
decays to
will not
DS1236
decays
CEI
is