LX8383-33IV Microsemi Analog Mixed Signal Group, LX8383-33IV Datasheet - Page 5
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LX8383-33IV
Manufacturer Part Number
LX8383-33IV
Description
IC REG LDO POS 7.5A 3.3V TO247
Manufacturer
Microsemi Analog Mixed Signal Group
Datasheet
1.LX8383-00CP.pdf
(7 pages)
Specifications of LX8383-33IV
Regulator Topology
Positive Fixed
Voltage - Output
3.3V
Voltage - Input
Up to 10V
Number Of Regulators
1
Current - Output
7.5A (Min)
Operating Temperature
-25°C ~ 125°C
Mounting Type
Through Hole
Package / Case
TO-247
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Dropout (typical)
-
Current - Limit (min)
-
Copyright © 1996
Rev. 1.0
OVERLOAD RECOVERY (continued)
If this limited current is not sufficient to develop the designed
voltage across the output resistor, the voltage will stabilize at some
lower value, and will never reach the designed value. Under these
circumstances, it may be necessary to cycle the input voltage down
to zero in order to make the regulator output voltage return to
regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor should
be chosen so that the impedance of the capacitor is equal in
magnitude to the resistance of R1 at the ripple frequency. The
capacitor value can be determined by using this equation:
case, 15µF.
amplitude will be essentially independent of the output voltage. If
an ADJ pin bypass capacitor is not used, output ripple will be
proportional to the ratio of the output voltage to the reference
voltage:
were to be bypassed to ground with a properly selected capacitor.
OUTPUT VOLTAGE
The LX8383/83A/83B ICs develop a 1.25V reference voltage between
the output and the adjust terminal (See Figure 2). By placing a resistor,
R1, between these two terminals, a constant current is caused to flow
through R1 and down through R2 to set the overall output voltage.
Normally this current is the specified minimum load current of 10mA.
Because I
through R1, it represents a small error and can usually be ignored.
At a ripple frequency of 120Hz, with R1 = 100 :
The closest equal or larger standard value should be used, in this
When an ADJ pin bypass capacitor is used, output ripple
For example, if V
Output ripple will be twice as bad as it would be if the ADJ pin
12/96
C = 1 / (6.28 * F
where: C
C = 1 / (6.28 * 120Hz * 100 ) = 13.3µF
M = V
where: M
M = 2.5V/1.25V= 2
ADJ
is very small and constant when compared with the current
OUT
F
R1
/V
V
R
REF
REF
= 1.25V.
OUT
R
the value of the capacitor in Farads;
select an equal or larger standard value.
the ripple frequency in Hz
the value of resistor R1 in ohms
a multiplier for the ripple seen when the
ADJ pin is optimally bypassed.
= 2.5V the output ripple will be:
* R1)
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
7 . 5 A L
P
R O D U C T I O N
O W
A P P L I C A T I O N N O T E S
D
R O P O U T
LX8383-xx/8383A-xx/8383B-xx
P
O S I T I V E
D
LOAD REGULATION
Because the LX8383/83A/83B regulators are three-terminal devices,
it is not possible to provide true remote load sensing. Load
regulation will be limited by the resistance of the wire connecting
the regulator to the load. The data sheet specification for load
regulation is measured at the bottom of the package. Negative side
sensing is a true Kelvin connection, with the bottom of the output
divider returned to the negative side of the load. Although it may
not be immediately obvious, best load regulation is obtained when
the top of the resistor divider, (R1), is connected directly to the case
of the regulator, not to the load. This is illustrated in Figure 3. If R1
were connected to the load, the effective resistance between the
regulator and the load would be:
resistance appears as its actual value, rather than the higher R
A T A
When the circuit is connected as shown in Figure 3, the parasitic
V
IN
R
where: R
FIGURE 3 — CONNECTIONS FOR BEST LOAD REGULATION
V
Peff
IN
= R
S
R
FIGURE 2 — BASIC ADJUSTABLE REGULATOR
V
E G U L A T O R S
H E E T
OUT
P
LX8383/83A/83B
IN
*
P
= V
R2+R1
Actual parasitic line resistance.
REF
ADJ
LX8383/83A/83B
IN
R1
50µA
1 +
I
ADJ
OUT
ADJ
R2
R1
+ I
Line Resistance
OUT
ADJ
Parasitic
R1
R2
R2
R
P
Connect
R1 to Case
of Regulator
V
REF
R1
R2
V
Connect
R2
to Load
OUT
R
L
Peff
.
5