AD7606BSTZ Analog Devices Inc, AD7606BSTZ Datasheet - Page 8

• Manufacturer Part Number: AD7606BSTZ
• Description: IC DAS W/ADC 16BIT 8CH 64LQFP
• Manufacturer: Analog Devices Inc
• Type: Data Acquisition System (DAS), ADCr

Specifications of AD7606BSTZ

• Resolution (bits): 16 b
• Data Interface: DSP, MICROWIRE™, Parallel, QSPI™, Serial, SPI™
• Design Resources: Layout Considerations for an Expandable Multichannel Simultaneous Sampling Data Acquisition System Based on AD7606 (CN0148)
• Sampling Rate (per Second): 200k
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFQFP
• Sampling Rate: 200kSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7606/AD7606-6/AD7606-4
Parameter
SERIAL READ OPERATION
FRSTDATA OPERATION
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
13
14
15
16
17
SCLK
18
19
20
21
22
23
24
25
26
4
4
Min
6
6
0.4 t
0.4 t
7
Limit at T
SCLK
SCLK
Typ
MIN
, T
MAX
Max
16
20
25
30
16
21
25
32
22
23.5
17
14.5
11.5
15
20
30
17
23
27
34
22
15
20
25
30
15
20
25
30
16
20
25
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. A | Page 8 of 36
Description
Delay from CS until DB[15:0] three-state disabled
V
V
V
V
Data access time after RD falling edge
V
V
V
V
Data hold time after RD falling edge
CS to DB[15:0] hold time
Delay from CS rising edge to DB[15:0] three-state enabled
Frequency of serial read clock
V
V
V
V
Delay from CS until D
until MSB valid
V
V
V
Data access time after SCLK rising edge
V
V
V
V
SCLK low pulse width
SCLK high pulse width
SCLK rising edge to D
CS rising edge to D
Delay from CS falling edge until FRSTDATA three-state disabled
V
V
V
V
Delay from CS falling edge until FRSTDATA high, serial mode
V
V
V
V
Delay from RD falling edge to FRSTDATA high
V
V
V
V
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
= 2.3 V to 2.7 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
OUT
OUT
OUT
A/D
A/D
A/D
OUT
OUT
OUT
B three-state enabled
B three-state disabled/delay from CS
B valid hold time