MCIMX253CJM4A Freescale Semiconductor, MCIMX253CJM4A Datasheet - Page 9
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MCIMX253CJM4A
Manufacturer Part Number
MCIMX253CJM4A
Description
IC MPU IMX25 IND 400MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Datasheet
1.MCIMX257CJM4.pdf
(154 pages)
Specifications of MCIMX253CJM4A
Core Processor
ARM9
Core Size
32-Bit
Speed
400MHz
Connectivity
1-Wire, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
128
Program Memory Type
External Program Memory
Ram Size
144K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.52 V
Data Converters
A/D 3x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
400-MAPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCIMX253CJM4A
Manufacturer:
JRC
Quantity:
10 000
Company:
Part Number:
MCIMX253CJM4A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCIMX253CJM4A
Manufacturer:
FREESCALE
Quantity:
20 000
2.1
Special signal considerations are listed in
“Package Information and Contact
Freescale Semiconductor
TSC (and ADC) Touchscreen
MESH_C, MESH_D Wire-mesh tamper detect pins that can be routed at the PCB board to detect attempted tampering of a
.
Mnemonic
USBHOST
EXT_ARMCLK
USBOTG
UART(5)
SSI(2)
Block
BAT_VDD
CLK_SEL
Signal
CLK0
Special Signal Considerations
I2S/SSI/AC97
interface
controller (and
A/D converter)
UART
interface
High-speed
USB
on-the-go
Block Name
DryIce backup power supply input.
Clock-out pin; renders the internal clock visible to users for debugging. The clock source is controllable
through CRM registers. This pin can also be configured (through muxing) to work as a normal GPIO.
Used to select the ARM clock source from MPLL out or from external EXT_ARMCLK. In normal operation,
CLK_SEL should be connected to GND.
Primarily for Freescale factory use. There is no internal on-chip pull-up/down on this pin, so it must be
externally connected to GND or VDD. Aside from factory use, this pin can also be configured (through
muxing) to work as a normal GPIO.
protected wire. When security measures are implemented, MESH_C should be pulled-up or connected to
NVCC_DRYICE and triggers a tamper event when floating or when connected to MESH_D. MESH_D
should be pulled-down or connected to GND and triggers an event when floating or connected to
MESH_C. These pins can be left unconnected if the DryIce security features are not being used.
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Table 3. i.MX25 Digital and Analog Modules (continued)
Connectivity
peripherals
Multimedia
peripherals
Connectivity
peripherals
Connectivity
peripherals
Subsystem
Assignment.”
Table 4. Signal Considerations
Table
The SSI is a full-duplex serial port that allows the processor to communicate
with a variety of serial protocols, including the Freescale Semiconductor SPI
standard and the inter-IC sound bus standard (I2S). The SSIs
interface to the AUDMUX for flexible audio routing.
The touchscreen controller and associated Analog-to-Digital Converter
(ADC) together provide a resistive touchscreen solution. The module
implements simultaneous touchscreen control and auxiliary ADC operation
for temperature, voltage, and other measurement functions.
Each of the UART modules supports the following serial data
transmit/receive protocols and configurations:
The USB module provides high-performance USB On-The-Go (OTG) and
host functionality (up to 480 Mbps), compliant with the USB 2.0 specification,
the OTG supplement, and the ULPI 1.0 Low Pin Count specification. The
module has DMA capabilities for handling data transfer between internal
buffers and system memory. An OTG HS PHY and HOST FS PHY are also
integrated.
• 7- or 8-bit data words, one or two stop bits, programmable parity (even,
• Programmable baud rates up to 4 MHz. This is a higher maximum baud
• IrDA-1.0 support (up to SIR speed of 115200 bps)
• Option to operate as 8-pins full UART, DCE, or DTE
odd, or none)
rate than the 1.875 MHz specified by the TIA/EIA-232-F standard and
previous Freescale UART modules. 32-byte FIFO on Tx and 32 half-word
FIFO on Rx supporting auto-baud
4. The package contact assignment is found in
Signal descriptions are provided in the reference manual.
Description
Brief Description
Section 4,
9