PIC18F4420-E/ML Microchip Technology, PIC18F4420-E/ML Datasheet - Page 6
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PIC18F4420-E/ML
Manufacturer Part Number
PIC18F4420-E/ML
Description
IC MCU FLASH 8KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2420-IML.pdf
(412 pages)
3.PIC18F2420-IML.pdf
(16 pages)
4.PIC18F2420-IML.pdf
(8 pages)
5.PIC18F2420-IML.pdf
(6 pages)
6.PIC18F2420-IML.pdf
(8 pages)
7.PIC18F2420-IML.pdf
(4 pages)
Specifications of PIC18F4420-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2420/2520/4420/4520
19. Module: EUSART
20. Module: Timer1/Timer3
DS80209H-page 6
When performing back-to-back transmission in 9-bit
mode (TX9D bit in the TXSTA register is set), the
second byte may be corrupted if it is written into
TXREG immediately after the TMRT bit is set.
Work around
Execute a software delay, at least one-half the
transmission’s bit time, after TMRT is set and prior
to writing subsequent bytes into TXREG.
Date Codes that pertain to this issue:
All engineering and production devices.
When Timer1 or Timer3 is configured for external
clock source, and the CCPxCON register is
configured with 0x0B (Compare mode, trigger
special event), the timer is not reset on a Special
Event Trigger.
Work around
Modify firmware to reset the Timer1/Timer3
registers upon detection of the compare match
condition — TMRxL and TMRxH.
Date Codes that pertain to this issue:
All engineering and production devices.
21. Module: Timer1/Timer3
22. Module: Timer1/Timer3
When Timer1 or Timer3 is in External Clock
Synchronized mode and the external clock period
is between 1 and 2 T
be skipped.
Work around
Avoid using an external clock with a period (1/
frequency) between 1 and 2 T
Date Codes that pertain to this issue:
All engineering and production devices.
When Timer1/Timer3 is operating in 16-bit mode
and the prescale setting is not 1:1, a write to the
TMR1H/TMR3H Buffer registers may lengthen the
duration of the period between the increments of
the timer for the period in which TMR1H/TMR3H
was written.
Work around
Two work arounds are available: 1) Stop Timer1/
Timer3
registers; 2) Write TMR1L/TMR3L immediately
after writing TMR1H/TMR3H.
Date Codes that pertain to this issue:
All engineering and production devices.
before
writing
© 2008 Microchip Technology Inc.
CY
, interrupts will occasionally
the
CY
.
TMR1H/TMR3H