MC9S08DV128CLH Freescale Semiconductor, MC9S08DV128CLH Datasheet - Page 130
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MC9S08DV128CLH
Manufacturer Part Number
MC9S08DV128CLH
Description
MCU 8BIT 128K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DV128CLH
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08DV
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
6 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
87
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DV128CLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 6 Parallel Input/Output Control
6.5.8.3
6.5.8.4
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
130
PTHPE[7:0]
PTHSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
rate control to the desired value to ensure correct operation.
W
W
R
R
PTHPE7
PTHSE7
Internal Pull Enable for Port H Bits — Each of these control bits determines if the internal pull-up device is
enabled for the associated PTH pin. For port H pins that are configured as outputs, these bits have no effect and
the internal pull devices are disabled.
0 Internal pull-up device disabled for port H bit n.
1 Internal pull-up device enabled for port H bit n.
Output Slew Rate Enable for Port H Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTH pin. For port H pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port H bit n.
1 Output slew rate control enabled for port H bit n.
Port H Pull Enable Register (PTHPE)
0
Port H Slew Rate Enable Register (PTHSE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
PTHPE6
PTHSE6
Figure 6-49. Internal Pull Enable for Port H Register (PTHPE)
Figure 6-50. Slew Rate Enable for Port H Register (PTHSE)
0
0
6
6
Table 6-47. PTHPE Register Field Descriptions
Table 6-48. PTHSE Register Field Descriptions
MC9S08DZ128 Series Data Sheet, Rev. 1
PTHPE5
PTHSE5
0
0
5
5
PTHPE4
PTHSE4
NOTE
0
0
4
4
Description
Description
PTHPE3
PTHSE3
3
0
3
0
PTHPE2
PTHSE2
0
0
2
2
PTHPE1
PTHSE1
Freescale Semiconductor
0
0
1
1
PTHPE0
PTHSE0
0
0
0
0
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