XR17D154IV-F Exar Corporation, XR17D154IV-F Datasheet - Page 46

IC UART PCI BUS QUAD 144LQFP

XR17D154IV-F

Manufacturer Part Number
XR17D154IV-F
Description
IC UART PCI BUS QUAD 144LQFP
Manufacturer
Exar Corporation
Type
IrDA or RS- 485r
Datasheet

Specifications of XR17D154IV-F

Number Of Channels
4, QUART
Package / Case
144-LQFP
Features
*
Fifo's
64 Byte
Protocol
RS485
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
6.25 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Supply Current
4 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V or 5 V
No. Of Channels
4
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
3V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1290

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XR17D154
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
MSR[5]: DSR Input Status
This input may be used for auto DTR/DSR flow control function, see
(RTS/CTS or DTR/DSR) Flow Control Operation” on page 31
flow control is not used, this bit is the compliment of the DSR# input. In the loopback mode, this bit is
equivalent to the DTR# bit in the MCR register. The DSR# input may be used as a general purpose input when
the modem interface is not used.
MSR[6]: RI Input Status
This bit is the compliment of the RI# input. In the loopback mode this bit is equivalent to bit-2 in the MCR
register. The RI# input may be used as a general purpose input when the modem interface is not used.
MSR[7]: CD Input Status
This bit is the compliment of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the MCR
register. The CD# input may be used as a general purpose input
The upper four bits 4-7 of this register sets the delay in number of bits time for the auto RS485 turn around
from transmit to receive.
MSR [7:4]
When Auto RS485 feature is enabled (FCTR bit-5=1) and RTS# output is connected to the enable input of a
RS-485 transceiver. These 4 bits select from 0 to 15 bit-time delay after the end of the last stop-bit of the last
transmitted character. This delay controls when to change the state of RTS# output. This delay is very useful in
long-cable networks.
5.8.11
T
ABLE
Modem Status Register (MSR) - Write-Only
17: A
UTO
Table 17
MSR[7]
RS485 H
0
0
0
0
0
9
0
0
1
1
1
1
1
1
1
1
shows the selection. The bits are enabled by EFR bit-4.
MSR[6]
ALF
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
-
DUPLEX
MSR[5]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D
IRECTION
MSR[4]
46
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
C
ONTROL
D
ELAY IN
for complete details. If automatic hardware
D
ELAY FROM
D
“Section 5.4, Automatic Hardware
ATA
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
B
IT
T
(
S
RANSMIT
) T
IME
-
TO
xr
-R
ECEIVE
REV. 1.2.2

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