71M6511-IGTR/F Maxim Integrated Products, 71M6511-IGTR/F Datasheet - Page 58

• Manufacturer Part Number: 71M6511-IGTR/F
• Description: IC ENERGY METER RESIDENT 64-LQFP
• Manufacturer: Maxim Integrated Products
• Type: Metering SoCr

Specifications of 71M6511-IGTR/F

• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Core: 80515 MPU
• Data Bus Width: 32 bit
• Data Ram Size: 7 KB
• Device Million Instructions Per Second: 5 MIPS
• Interface Type: UART
• Maximum Clock Frequency: 70 Hz
• Maximum Operating Temperature: + 85 C
• Number Of Programmable I/os: 12
• Operating Supply Voltage: 3.3 V
• Processor Series: 71M6511
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

S S I _ B E G 2071
TRIMSEL 20FD
SFR MAP (SFRs Specific to TERIDIAN 80515) – In Numerical Order
‘Not Used’ bits are blacked out and contain no memory and are read by the MPU as zero. RESERVED bits are in use and
should not be changed. This table lists only the SFR registers that are not generic 8051 SFR registers.
Page: 58 of 98
SSI_END 2072
FLSHCTL
INTBITS
LCD38
LCD39
LCD40
LCD41
PGADR
ERASE
RTM0
RTM1
RTM2
RTM3
Name
TRIM
DIR0
DIR1
DIR2
WDI
SSI
P0
P1
P2
A Maxim Integrated Products Brand
20FF
2056
2057
2058
2059
2060
2061
2062
2063
2070
SFR
Addr
A2
A0
A1
E8
B2
B7
9E
80
90
91
F8
94
9F
PREBOOT
WD_RST
SSI_EN
Bit 7
DIO_1[7:6] (Port 1)
DIO_DIR1[7:6]
SSI_10M
SECURE
Bit 6
DIO_0[7:4] (Port 0)
INT6
DIO_DIR0[7:4]
© 2005–2010 Teridian Semiconductor Corporation
Synchronous Serial Interface:
SSI_CKGATE
Fuse Selection Registers:
Interrupts and WD Timer:
Bit 5
INT5
Serial EEPROM:
RTM Probes:
Digital I/O:
FLSH_PGADR[6:0]
Flash:
Bit 4
INT4
FLSH_ERASE[7:0]
SSI_FSIZE[1:0]
TRIMSEL[7:0]
SSI_BEG[7:0]
SSI_END[7:0]
EEDATA[7:0]
EECTRL[7:0]
RESERVED
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
TRIM[7:0]
Single-Phase Energy Meter IC
1111
Bit 3
INT3
71M6511/71M6511H
DATA SHEET
SSI_FPOL
Bit 2
INT2
DIO_1[3:0] (Port 1)
DIO_DIR1[3:0]
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
1111
FLSH_MEEN
SSI_RDYEN
IE_RTC
Bit 1
INT1
DIO_2[1:0] (Port 2)
DIO_DIR2[1:0]
NOVEMBER 2010
SSI_RDYPOL
FLSH_PWE
IE_XFER
Bit 0
INT0
V2.7