71M6513-IGTR/F Maxim Integrated Products, 71M6513-IGTR/F Datasheet - Page 10
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71M6513-IGTR/F
Manufacturer Part Number
71M6513-IGTR/F
Description
IC ENERGY METER 3PH 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6513H-IGTF.pdf
(104 pages)
Specifications of 71M6513-IGTR/F
Mounting Style
SMD/SMT
Package / Case
LQFP-100
Program Memory Size
64 KB
Program Memory Type
Flash
Supply Current (max)
6.4 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6513-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
The MUX_ALT bit requests an alternate multiplexer cycle. The bit may be asserted on any MPU cycle and may be sub-
sequently de-asserted on any cycle including the next one. A rising edge on MUX_ALT will cause the Control Circuit to wait
until the next multiplexer cycle and implement a single alternate cycle.
Multiplexer Control Circuit also controls the FIR filter initiation and the chopping of the ADC reference voltage, VREF. The
Multiplexer Control Circuit is clocked by CK32, the 32768Hz clock from the PLL block, and launches each pass through the CE
program.
ADC
A single 21/22-bit delta-sigma A/D converter digitizes the power inputs to the AFE. The resolution of the ADC is programmable
using the I/O RAM register FIR_LEN register (0x2005[4]). ADC resolution may be selected to be 21 bits (FIR_LEN=0), or 22
bits (FIR_LEN=1). Conversion time is two cycles of CK32 with FIR_LEN = 0 and three cycles with FIR_LEN = 1.
Accuracy, timing and functional specifications in this data sheet are based on FIR_LEN = 0 (two CK32 cycles).
Initiation of each ADC conversion is controlled by the Multiplexer Control Circuit as described previously.
FIR Filter
The finite impulse response (FIR) filter is an integral part of the ADC and it is optimized for use with the multiplexer. The
purpose of the FIR is to decimate the ADC output to the desired resolution. At the end of each ADC conversion, the output
data of the FIR filter (raw data) is stored into the CE DRAM location determined by the multiplexer selection. The location of
the raw data in the CE DRAM is specified in the CE Program and Environment Section.
Voltage Reference
The 71M6513/6513H includes an on-chip precision bandgap voltage reference that incorporates auto-zero techniques. The
reference of the 71M6513H is trimmed in production to minimize errors caused by component mismatch and drift. The result is
a voltage output with a predictable temperature coefficient.
The voltage reference is chopper stabilized, i.e. the polarity can be switched by the MPU using the I/O RAM register CHOP_EN
(0x2002[5:4]). The two bits in the CHOP_EN register enable the MPU to operate the chopper circuit in regular or inverted
operation, or in “toggling” mode. When the chopper circuit is toggled in between multiplexer cycles, DC offsets on the
measured signals will automatically be averaged out.
The general topology of a chopped amplifier is given in Figure 2.
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as controlled by CROSS in
the “A” position, the output voltage is:
Page: 10 of 104
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
A Maxim Integrated Products Brand
V
V
inp
inn
CROSS
Figure 2: General Topology of a Chopped Amplifier
© 2005-2011 Teridian Semiconductor Corporation
A
B
A
B
+
-
G
3-Phase Energy Meter IC
A
B
B
A
71M6513/71M6513H
DATA SHEET
V
V
outp
outn
AUGUST 2011