XRP7714ILB-F Exar Corporation, XRP7714ILB-F Datasheet - Page 6

• Manufacturer Part Number: XRP7714ILB-F
• Description: IC CTRLR PWM/LDO STP-DWN 40TQFN
• Manufacturer: Exar Corporation
• Type: Step-Down (Buck)r

Specifications of XRP7714ILB-F

• Number Of Outputs: 4
• Package / Case: 40-WFQFN Exposed Pad
• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Voltage - Output: 0.9 ~ 5.1 V
• Frequency - Switching: 300kHz ~ 1.5MHz
• Voltage - Input: 4.75 ~ 25 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Switching Frequency: 300 KHz
• Operating Supply Voltage: 4.75 V to 25 V
• Supply Current: 28 mA to 50 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Output Voltage: 0.9 V to 5.1 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 1016-1350 - EVAL BAORD FOR XRP77141016-1344 - IN-SOCKET PROG BRD VIA USB/GUI
• Current - Output: -
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 1016-1351

PIN ASSIGNMENT
PIN DESCRIPTION
© 2010 Exar Corporation
PGND1- PGND4
Name
DVDD
VCCD
AVDD
VCCA
DGND
VIN1
VIN2
Pin Number
36,31,16,21
39
38
37
26
10
1
2
Power source for the internal linear regulators to generate VCCA, VDD and the Standby
LDO (LDOOUT). Place a decoupling capacitor close to the controller IC. Also used in
UVLO1 fault generation – if VIN1 falls below the user programmed limit, all channels
are shut down. The VIN1 pin needs to be tied to VIN2 on the board with a short trace.
If the Vin2 pin voltage falls below the user programmed UVLO VIN2 level all channels
are shut down. The VIN2 pin needs to be tied to VIN1 on the board with a short trace.
Output of the internal 5V LDO. This voltage is internally used to power analog blocks.
Note that a compensation capacitor should be used on this pin (see application note).
Gate Drive input voltage. This is not an output voltage. This pin can be connected to
VCCA to provide power for the Gate Drive. VCCD should be connected to VCCA with the
shortest possible trace and decouple with a minimum 1µF capacitor. Alternatively,
VCCD could be connected to an external supply (not greater than 5V).
Power Ground. Ground connection for the low side gate driver.
Output of the internal 1.8V LDO. A decoupling capacitor should be placed between
AVDD and AGND close to the chip (with short traces).
Input for powering the internal digital logic. This pin should be connected to AVDD.
Digital Ground. This pin should be connected to the ground plane at the exposed pad
with a separate trace.
Q
Q
u
u
Fig. 3: XRP7714 Pin Assignment
a
a
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C
C
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6/27
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D
D
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Description
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P
P
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W
M
M
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D
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R
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Rev. 1.1.3
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