73S8009C-DB Maxim Integrated Products, 73S8009C-DB Datasheet - Page 24

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73S8009C-DB

Manufacturer Part Number
73S8009C-DB
Description
BOARD DEMO 73S8009C 32-QFN
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of 73S8009C-DB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
73S8009C Data Sheet
3.9
The states of the I/O, AUX1, and AUX2 pins are low after power on reset and they are in high when the
activation sequencer turns on the I/O reception state. See the
section for more details on when the I/O reception is enabled. The states of I/OUC, AUX1UC, and
AUX2UC are high after power on reset.
Within a card session and when the I/O reception state is turned on, the first I/O line on which a falling
edge is detected becomes the input I/O line and the other becomes the output I/O line. When the input
I/O line rising edge is detected, then both I/O lines return to their neutral state. Figure 9 shows the state
diagram of how the I/O and I/OUC lines are managed to become input or output.
24
I/O Circuitry and Timing
Figure 9: I/O and I/OUC State Diagram
No
not I/OUC
reception
Neutral
not I/O
State
I/OUC
I/OUC
I/OUC
Yes
Yes
yes
I/O
I/O
No
in
&
&
No
Activation and De-activation Sequence
No
I/OICC
Yes
yes
I/O
in
No
DS_8009C_025
Rev. 1.5

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