73M1903C-EVM Maxim Integrated Products, 73M1903C-EVM Datasheet - Page 3

• Manufacturer Part Number: 73M1903C-EVM
• Description: BOARD DEMO 73M1903C WORLDWIDE
• Manufacturer: Maxim Integrated Products

Specifications of 73M1903C-EVM

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Embedded: -

DS_1903C_033
73M1903C Data Sheet
Figures
Figure 1: SCLK and FS with SckMode=0 ................................................................................................. 8
Figure 2: Control Frame Position versus SPOS ........................................................................................ 8
Figure 3: Serial Port Timing Diagrams ..................................................................................................... 9
Figure 4: 73M1903C Host Connection in Master and Slave Modes ........................................................ 10
Figure 5: 73M1903C Daisy Chaining for Master/Slave Mode and Slave Modes ...................................... 10
Figure 6: Clock Generation .................................................................................................................... 19
Figure 7: Analog Block Diagram ............................................................................................................. 22
Figure 8: Overall TX Path Frequency Response at 8 kHz Sample Rate .................................................. 23
Figure 9: Frequency Response of TX Path for DC to 4 kHz in Band Signal at 8 kHz Sample Rate .......... 24
Figure 10: Overall Receiver Frequency Response at 8 kHz Sample Rate ............................................... 26
Figure 11: Rx Passband Response at 8 kHz Sample Rate ..................................................................... 27
Figure 12: RXD Spectrum of 1 kHz Tone ............................................................................................... 28
Figure 13: RXD Spectrum of 0.5 kHz, 1 kHz, 2 kHz, 3 kHz and 3.5 kHz Tones of Equal Amplitudes ....... 28
Figure 14: Serial Port Data Timing ......................................................................................................... 32
Figure 15: Typical DAA Block Diagram .................................................................................................. 39
Figure 16: Single Transmitter Arrangement ............................................................................................ 40
Figure 17: Dual transmitter arrangement ................................................................................................ 41
Figure 18: NCO Block Diagram .............................................................................................................. 42
Figure 19: PLL Block Diagram ............................................................................................................... 43
Tables
Table 1: 32 QFN Pin Description .............................................................................................................. 4
Table 2: Register Map ........................................................................................................................... 12
Table 3: Fvco and Kvco Settings at 25°C ............................................................................................... 16
Table 4: PLL Power Down ..................................................................................................................... 18
Table 5: Clock Generation Register Settings for Fxtal = 27 MHz ............................................................ 19
Table 6: Clock Generation Register Settings for Fxtal = 24.576 MHz ...................................................... 20
Table 7: Clock Generation Register Settings for Fxtal = 9.216 MHz ........................................................ 20
Table 8: Clock Generation Register Settings for Fxtal = 24.000 MHz ...................................................... 21
Table 9: Clock Generation Register Settings for Fxtal = 25.35 MHz ........................................................ 21
Table 10: Peak to RMS Ratios and Maximum Transmit .......................................................................... 25
Table 11: Receive Gain ......................................................................................................................... 26
Table 12: Absolute Maximum Ratings .................................................................................................... 30
Table 13: Recommended Operation Conditions ..................................................................................... 30
Table 14: DC Characteristics ................................................................................................................. 31
Table 15: Serial Interface Timing ........................................................................................................... 32
Table 16: Reference Voltage Specifications ........................................................................................... 33
Table 17: Maximum Transmit Levels ...................................................................................................... 33
Table 18: Receiver Performance Specifications ..................................................................................... 34
Table 19: Transmitter Performance Specifications ................................................................................. 35
Rev. 5.0
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