M5373EVB Freescale Semiconductor, M5373EVB Datasheet - Page 31
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M5373EVB
Manufacturer Part Number
M5373EVB
Description
KIT EVAL FOR MCF537X
Manufacturer
Freescale Semiconductor
Series
ColdFire®r
Type
MPUr
Datasheet
1.MCF5372LCVM240J.pdf
(46 pages)
Specifications of M5373EVB
Contents
Module and Misc Hardware
For Use With/related Products
MCF537x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
5.13
MII signals use TTL signal levels compatible with devices operating at 5.0 V or 3.3 V.
5.13.1
The receiver functions correctly up to a FEC_RXCLK maximum frequency of 25 MHz +1%. The processor clock frequency
must exceed twice the FEC_RXCLK frequency.
Table 18
Figure 18
5.13.2
Table 19
The transmitter functions correctly up to a FEC_TXCLK maximum frequency of 25 MHz +1%. The processor clock frequency
must exceed twice the FEC_TXCLK frequency.
Figure 19
Freescale Semiconductor
Num
Num
M5
M6
M7
M8
M1
M2
M3
M4
FEC_RXD[3:0] (inputs)
lists MII receive channel timings.
lists MII transmit channel timings.
shows MII receive signal timings listed in
shows MII transmit signal timings listed in
FEC_RXCLK (input)
Fast Ethernet AC Timing Specifications
FEC_TXCLK to FEC_TXD[3:0], FEC_TXEN, FEC_TXER invalid
FEC_TXCLK to FEC_TXD[3:0], FEC_TXEN, FEC_TXER valid
FEC_TXCLK pulse width high
FEC_TXCLK pulse width low
MII Receive Signal Timing
MII Transmit Signal Timing
FEC_RXD[3:0], FEC_RXDV, FEC_RXER to FEC_RXCLK setup
FEC_RXCLK to FEC_RXD[3:0], FEC_RXDV, FEC_RXER hold
FEC_RXCLK pulse width high
FEC_RXCLK pulse width low
FEC_RXER
FEC_RXDV
MCF537x ColdFire
Figure 18. MII Receive Signal Timing Diagram
Characteristic
Characteristic
Table 19. MII Transmit Signal Timing
Table 18. MII Receive Signal Timing
M1
Table
®
Table
Microprocessor Data Sheet, Rev. 4
M2
18.
19.
M3
M4
35%
35%
35%
35%
Min
Min
—
5
5
5
65%
65%
Max
Max
65%
65%
25
—
—
—
Electrical Characteristics
FEC_RXCLK period
FEC_RXCLK period
FEC_TXCLK period
FEC_TXCLK period
Unit
Unit
ns
ns
ns
ns
31